74LCX112MTC Fairchild Semiconductor, 74LCX112MTC Datasheet

IC FLIP FLOP DUAL JK NEG 16TSSOP

74LCX112MTC

Manufacturer Part Number
74LCX112MTC
Description
IC FLIP FLOP DUAL JK NEG 16TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LCXr
Type
JK Typer
Datasheet

Specifications of 74LCX112MTC

Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
150MHz
Delay Time - Propagation
7ns
Trigger Type
Negative Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LCX112MTC
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
74LCX112MTCX
Manufacturer:
FAIRCHILD
Quantity:
12 500
Part Number:
74LCX112MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2001 Fairchild Semiconductor Corporation
74LCX112M
74LCX112SJ
74LCX112MTC
74LCX112
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop
with 5V Tolerant Inputs
General Description
The LCX112 is a dual J-K flip-flop. Each flip-flop has inde-
pendent J, K, PRESET, CLEAR, and CLOCK inputs with Q,
Q outputs. These devices are edge sensitive and change
state on the negative going transition of the clock pulse.
Clear and preset are independent of the clock and accom-
plished by a low logic level on the corresponding input.
LCX devices are designed for low voltage (3.3V or 2.5)
operation with the added capability of interfacing to a 5V
signal environment.
The 74LCX112 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
Package Number
MTC16
IEEE/IEC
M16A
M16D
Pin Names
J
CP
C
S
Q
1
D1
D1
1
, J
, Q
1
, S
, C
, CP
2
, K
2
D2
D2
, Q
1
2
, K
1
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
, Q
2
2
DS012424
Description
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active LOW)
Direct Set Inputs (Active LOW)
Outputs
Features
Connection Diagram
5V tolerant inputs
2.3V–3.6V V
7.5 ns t
Power down high impedance inputs and outputs
Implements patented noise/EMI reduction circuitry
Latch-up performance exceeds 500 mA
ESD performance:
24 mA output drive (V
Package Description
Human body model
Machine model
PD
max (V
CC
specifications provided
CC
3.3V), 10 A I
2000V
CC
2000V
3.0V)
June 1998
Revised February 2001
CC
www.fairchildsemi.com
max

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74LCX112MTC Summary of contents

Page 1

... Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX112SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX112MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. ...

Page 2

Truth Table (Each half H(h) HIGH Voltage Level L(l) LOW Voltage Level  X Immaterial HIGH-to-LOW Clock Transition ...

Page 3

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Source/Sink Current Supple ...

Page 4

AC Electrical Characteristics Symbol Parameters f Maximum Clock Frequency MAX t Propagation Delay PHL PLH Propagation Delay PHL PLH ...

Page 5

AC Loading and Waveforms ( PLH t PZL t PZH Waveform for Inverting and Non-Inverting Functions Propagation Delay, Pulse Width and t rec 3-STATE Output High Enable and Disable TImes for Logic (Input Pulse Characteristics; f=1MHz, t Symbol ...

Page 6

Schematic Diagram Generic for LCX Family www.fairchildsemi.com 6 ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...

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