upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 245

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upd78f0124hgba1-8et-a

Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
(11) A/D converter sampling time and A/D conversion start delay time
Note The A/D conversion start delay time is the time after wait period. For the wait function, see CHAPTER 31
Remark f
(12) Register generating wait cycle
FR2
Sampling timing
0
0
0
1
1
1
The A/D converter sampling time differs depending on the set value of the A/D converter mode register (ADM).
The delay time exists until actual sampling is started after A/D converter operation is enabled.
When using a set in which the A/D conversion time must be strictly observed, care is required for the contents
shown in Figure 12-21 and Table 12-3.
Do not read data from the ADCR register and do not write data to the ADM, ADS, PFM, and PFT registers while
the CPU is operating on the subsystem clock and while high-speed system clock oscillation is stopped.
Other than above
CAUTIONS FOR WAIT.
Table 12-3. A/D Converter Sampling Time and A/D Conversion Start Delay Time (ADM Set Value)
X
INTAD
FR1
ADCS
: High-speed system clock oscillation frequency
0
0
1
0
0
1
Figure 12-21. Timing of A/D Converter Sampling and A/D Conversion Start Delay
ADCS ← 1 or ADS rewrite
FR0
0
1
0
0
1
0
288/f
240/f
192/f
144/f
120/f
96/f
Setting prohibited
period
Wait
X
X
X
X
X
X
conversion
start delay
Conversion Time
A/D
time
CHAPTER 12 A/D CONVERTER
User’s Manual U16962EJ3V0UD
Sampling
time
Conversion time
40/f
32/f
24/f
20/f
16/f
12/f
Sampling Time
X
X
X
X
X
X
32/f
28/f
24/f
16/f
14/f
12/f
A/D Conversion Start Delay Time
X
X
X
X
X
X
MIN.
Sampling
Conversion time
time
36/f
32/f
28/f
18/f
16/f
14/f
X
X
X
X
X
X
MAX.
Note
245

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