upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 363

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upd78f0124hgba1-8et-a

Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
20.4 Operation of Clock Monitor
This section explains the functions of the clock monitor. The monitor start and stop conditions are as follows.
<Monitor start condition>
<Monitor stop condition>
Note The internal oscillation clock is stopped only when the “internal oscillator can be stopped by software” is
The clock monitor timing is as shown in Figure 20-3.
CPU Operation Clock
High-speed system
clock
Internal oscillation
clock
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to operation enabled (1).
• Reset is released and during the oscillation stabilization time
• In STOP mode and during the oscillation stabilization time
• When the high-speed system clock is stopped by software (MSTOP = 1 or MCC = 1) and during the
• When the internal oscillation clock is stopped
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
oscillation stabilization time
selected by the option byte. If “internal oscillator cannot be stopped” is selected, the internal oscillation
clock cannot be stopped.
MCC:
Table 20-2. Operation Status of Clock Monitor (When CLME = 1)
STOP mode
RESET input
Normal operation mode
HALT mode
STOP mode
RESET input
Normal operation mode
HALT mode
Bit 7 of the processor clock control register (PCC)
Operation Mode
CHAPTER 20 CLOCK MONITOR
User’s Manual U16962EJ3V0UD
Stopped
Oscillating
Stopped
Oscillating
Stopped
High-Speed System
Clock Status
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Stopped
Oscillating
Internal Oscillation
Clock Status
Note
Note
Note
Stopped
Operating
Stopped
Stopped
Operating
Stopped
Clock Monitor Status
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