si4430 Silicon Laboratories, si4430 Datasheet - Page 142
si4430
Manufacturer Part Number
si4430
Description
Si4430 Ism Transceiver
Manufacturer
Silicon Laboratories
Datasheet
1.SI4430.pdf
(152 pages)
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Register 71h. Modulation Mode Control 2
Si4430
Reset value = 00000000
The frequency deviation can be calculated: Fd = 625 Hz x fd[8:0].
142
Name
Type
Bit
7:6
5:4
1:0
Bit
3
2
modtyp[1:0]
dtmod[1:0]
trclk[1:0]
Name
D7
eninv
fd[8]
trclk[1:0]
R/W
TX Data Clock Configuration.
00:
01:
10:
11:
Modulation Source.
00:
01:
10:
11:
Invert TX and RX Data.
MSB of Frequency Deviation Setting, see "Register 72h. Frequency Deviation".
Modulation Type.
00:
01:
10:
11:
D6
No TX Data CLK is available (asynchronous mode – Can only work with modula-
TX Data CLK is available via the GPIO (one of the GPIO’s should be programmed
TX Data CLK is available via the SDO pin.
TX Data CLK is available via the nIRQ pin.
tions FSK or OOK).
as well).
Direct Mode using TX_Data function via the GPIO pin (one of the GPIO’s should
be programmed accordingly as well)
Direct Mode using TX_Data function via the SDI pin (only when nSEL is high)
FIFO Mode
PN9 (internally generated)
Unmodulated carrier
OOK
FSK
GFSK (enable TX Data CLK (trclk[1:0]) when direct mode is used)
D5
dtmod[1:0]
R/W
Preliminary Rev. 0.4
D4
Function
eninv
R/W
D3
fd[8]
R/W
D2
D1
modtyp[1:0]
R/W
D0