ltc4266a Linear Technology Corporation, ltc4266a Datasheet - Page 18

• Manufacturer Part Number: ltc4266a
• Description: Quad Poe/poe+/ltpoe++ Pse Controller
• Manufacturer: Linear Technology Corporation

LTC4266A/LTC4266C
Operating Modes
The LTC4266A/LTC4266C include four independent ports,
each of which can operate in one of four modes: manual,
semi-auto, AUTO pin, or shutdown.
Table 2. Operating Modes
MODE
AUTO Pin
Reserved
Semi-auto
Manual
Shutdown
• In manual mode, the port waits for instructions from the
• In semi-auto mode, the port repeatedly attempts to
• AUTO pin mode operates the same as semi-auto mode
• In shutdown mode, the port is disabled and will not
Regardless of which mode it is in, the LTC4266A/LTC4266C
will remove power automatically from any port that gener-
ates a current limit fault. It will also automatically remove
power from any port that generates a disconnect event if
disconnect detection is enabled. The host controller may
also command the port to remove power at any time.
APPLICATIONS INFORMATION
18
host system before taking any action. It runs a single
detection or classification cycle when commanded to
by the host, and reports the result in its Port Status
register. The host system can command the port to turn
on or off the power at any time. This mode should only
be used for diagnostic and test purposes.
detect and classify any PD attached to it. It reports the
status of these attempts back to the host, and waits for
a command from the host before turning on power to
the port. The host must enable detection (and optionally
classification) for the port before detection will start.
except that it will automatically turn on the power to the
port if detection is successful. In AUTO pin mode, I
and I
LTC4266C. The AUTO pin must be high at reset to ensure
proper AUTO pin mode operation.
detect or power a PD.
LIM
AUTO
PIN
values are set automatically by the LTC4266A/
1
0
0
0
0
OPMD
11b
11b
10b
01b
00b
Once Upon
Enabled at
DETECT/
Disabled
Enabled
Request
CLASS
Reset
Host
N/A
Automatically
POWER-UP
Disabled
Request
Request
Upon
Upon
N/A
ASSIGNMENT
AUTOMATIC
I
CUT
Yes
N/A
No
No
No
/I
LIM
CUT
Reset and the AUTO/MID Pins
The initial LTC4266A/LTC4266C configuration depends on
the state of the AUTO and MID pins during reset. Reset
occurs at power-up, or whenever the RESET pin is pulled
low or the global Reset All bit is set. Note that the AUTO pin
is only sampled when a reset occurs. Changing the state
of AUTO or MID after power-up will not change the port
behavior of the LTC4266A/LTC4266C until a reset occurs.
Although typically used with a host controller, the
LTC4266A/LTC4266C can also be used in a standalone
mode with no connection to the serial interface. If there
is no host present, the AUTO pin should be tied high so
that, at reset, all ports will be configured to operate au-
tomatically. Each port will detect and classify repeatedly
until a PD is discovered, set I
the classification results, apply power after successful
detection, and remove power when a PD is disconnected.
Table 3 shows the I
matically set in standalone (AUTO pin) mode, based on
the discovered class.
Table 3. I
CLASS
Class 1
Class 2
Class 3 or Class 0
Class 4
The automatic setting of the I
occurs if the LTC4266A/LTC4266C is reset with the AUTO
pin high.
If the standalone application is a midspan, the MID pin should
be tied high to enable correct midspan detection timing.
DETECTION
Detection Overview
To avoid damaging network devices that were not designed
to tolerate DC voltage, a PSE must determine whether
the connected device is a real PD before applying power.
The IEEE specification requires that a valid PD have a
common-mode resistance of 25k ±5% at any port volt-
age below 10V. The PSE must accept resistances that fall
CUT
and I
LIM
Values in Standalone AUTO Pin Mode
CUT
and I
112mA
206mA
375mA
638mA
I
CUT
LIM
CUT
CUT
values that will be auto-
and I
and I
LIM
LIM
according to
425mA
425mA
425mA
850mA
values only
I
LIM
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