ltc4266a Linear Technology Corporation, ltc4266a Datasheet - Page 19

• Manufacturer Part Number: ltc4266a
• Description: Quad Poe/poe+/ltpoe++ Pse Controller
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
4-Point Detection
The LTC4266A/LTC4266C uses a 4-point detection method
to discover PDs. False-positive detections are minimized by
checking for signature resistance with both forced-current
and forced-voltage measurements. Initially, two test cur-
rents are forced onto the port (via the OUTn pin) and the
resulting voltages are measured. The detection circuitry
subtracts the two V-I points to determine the resistive slope
while removing offset caused by series diodes or leakage
at the port (see Figure 12). If the forced-current detection
yields a valid signature resistance, two test voltages are
then forced onto the port and the resulting currents are
measured and subtracted. Both methods must report
valid resistances for the port to report a valid detection.
PD signature resistances between 17k and 29k (typically)
are detected as valid and reported as Detect Good in the
between 19k and 26.5k, and it must reject resistances
above 33k or below 15k (shaded regions in Figure 11).
The PSE may choose to accept or reject resistances in the
undefined areas between the must-accept and must-reject
ranges. In particular, the PSE must reject standard computer
network ports, many of which have 150Ω common-mode
termination resistors that will be damaged if power is ap-
plied to them (the black region at the left of Figure 11).
RESISTANCE
Figure 11. IEEE 802.3af Signature Resistance Ranges
PSE
PD
0Ω
275
165
150Ω (NIC)
OFFSET
0V-2V
VALID PD
Figure 12. PD Detection
10k
25kΩ SLOPE
VOLTAGE
15k
DETECTION
SECOND
POINT
20k
19k
23.75k
DETECTION
POINT
FIRST
4266AC F12
26.25k
26.5k
30k
33k
4266AC F11
corresponding Port Status register. Values outside this
range, including open and short-circuits, are also reported.
If the port measures less than 1V at the first forced-current
test, the detection cycle will abort and Short Circuit will
be reported. Table 4 shows the possible detection results.
Table 4. Detection Status
MEASURED PD SIGNATURE
Incomplete or Not Yet Tested
<2.4k
Capacitance > 2.7μF
2.4k < R
17k < R
>29k
>50k
Voltage > 10V
More On Operating Modes
The port’s operating mode determines when the LTC4266A/
LTC4266C runs a detection cycle. In manual mode, the
port will idle until the host orders a detect cycle. It will
then run detection, report the results, and return to idle
to wait for another command.
In semi-auto mode, the LTC4266A/LTC4266C autono-
mously polls a port for PDs, but it will not apply power
until commanded to do so by the host. The Port Status
register is updated at the end of each detection cycle. If a
valid signature resistance is detected and classification is
enabled, the port will classify the PD and report that result
as well. The port will then wait for at least 100ms (or 2
seconds if midspan mode is enabled), and will repeat the
detection cycle to ensure that the data in the Port Status
register is up-to-date.
If the port is in semi-auto mode and high power opera-
tion is enabled, the port will not turn on in response to
a power-on command unless the current detect result is
Detect Good. Any other detect result will generate a t
fault if a power-on command is received. If the port is not
in high power mode, it will ignore the detection result and
apply power when commanded, maintaining backwards
compatibility with the LTC4259A.
PD
PD
< 29k
< 17k
LTC4266A/LTC4266C
DETECTION RESULT
Detect Status Unknown
Short Circuit
C
R
Detect Good
R
Open Circuit
Port Voltage Outside Detect Range
PD
SIG
SIG
Too High
Too Low
Too High
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