ltc4266a Linear Technology Corporation, ltc4266a Datasheet - Page 22

• Manufacturer Part Number: ltc4266a
• Description: Quad Poe/poe+/ltpoe++ Pse Controller
• Manufacturer: Linear Technology Corporation

APPLICATIONS INFORMATION
LTC4266A/LTC4266C
Current Limit
Each LTC4266A/LTC4266C port includes two current limit-
ing thresholds (I
timer (t
depends on several factors: the class of the PD, the volt-
age of the main supply (V
Type 2), the sense resistor (0.5Ω or 0.25Ω), the SOA of
the MOSFET, and whether or not the system is required
to implement class enforcement.
Per the IEEE specification, the LTC4266A/LTC4266C will
allow the port current to exceed I
of time before removing power from the port, whereas it
will actively control the MOSFET gate drive to keep the port
current below I
limit the current when only the I
but does start the t
the I
t
counts up. If the t
port is turned off and the port t
the current limit circuitry to tolerate intermittent overload
signals with duty cycles below about 6%; longer duty cycle
overloads will turn the port off.
The I
actively limiting port current. The t
only when the programmable t
allows t
more aggressive MOSFET protection and turn off a port
before MOSFET damage can occur. The t
when the I
reaches 1.7ms (typ) times the programmable t
port is turned off and the port t
t
timer, which counts up during both I
I
port to tolerate minor faults without current limiting.
Per the IEEE specification, the LTC4266A/LTC4266C will
automatically set I
during inrush at port turn-on, and then switch to the
programmed I
22
CUT
LIMn
CUT
is typically set to a lower value than I
CUT
timer counts back down, but at 1/16 the rate that it
LIM
field is zero, t
CUT
LIM
current threshold before its timer expires, the
current limiting circuit is always enabled and
LIM
to be set to a shorter value than t
and t
threshold is exceeded. When the t
LIM
LIM
LIM
CUT
LIM
. The port does not take any action to
CUT
LIM
setting once inrush has completed.
). Setting the I
CUT
and I
to 425mA (shown in bold in Table 6)
timer reaches 60ms (typical) the
behaviors are tracked by the t
timer. If the current drops below
LIM
EE
), the type of PSE (Type 1 or
), each with a corresponding
CUT
LIMn
CUT
LIM
CUT
CUT
fault is set. This allows
threshold is exceeded,
field is non-zero. This
fault is set. When the
LIM
LIM
and I
for a limited period
timer is enabled
and I
LIM
LIM
LIM
CUT
LIMn
timer starts
CUT
to allow the
thresholds
to provide
LIM
field the
events.
timer
CUT
To maintain IEEE compliance, I
for all Type 1 PDs, and 850mA if a Type 2 PD is detected.
I
Table 6. Example Current Limit Settings
I
The LTC4266A/LTC4266C features a two-stage foldback
circuit that reduces the port current if the port voltage falls
below the normal operating voltage. This keeps MOSFET
power dissipation at safe levels for typical 802.3af MOS-
FETs, even at extended 802.3at power levels. Current
limit and foldback behavior are programmable on a per-
port basis. Table 6 gives examples of recommended I
register settings.
LIM
LIM
is automatically reset to 425mA when a port turns off.
Foldback
I
LIM
1063
1169
1275
1488
1700
1913
2125
2338
2550
2975
106
159
213
266
319
372
425
478
531
584
638
744
850
956
53
(mA)
R
INTERNAL REGISTER SETTING (hex)
SENSE
CB
D2
88
08
89
80
8A
09
8B
00
8E
92
10
40
4A
50
5A
60
52
= 0.5Ω
LIM
should be kept at 425mA
R
SENSE
CA
D0
DA
88
08
89
80
8A
90
9A
C0
E0
49
40
4A
50
5A
60
52
= 0.25Ω
4266acfa
LIM