mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 21

• Manufacturer Part Number: mg82fel308
• Description: A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
• Manufacturer: Megawin Technology

8.2. On-Chip Data RAM
Fig 8-1 shows the internal and external data memory spaces available to the MG82FE(L)308/316 user. Internal
data memory can be divided into three blocks, which are generally referred to as the lower 128 bytes of RAM, the
upper 128 bytes of RAM, and the 128 bytes of SFR space. Internal data memory addresses are always 8-bit
wide, which implies an address space of only 256 bytes. Direct addresses higher than 7FH access the SFR
space; and indirect addresses higher than 7FH access the upper 128 bytes of RAM. Thus the SFR space and
the upper 128 bytes of RAM occupy the same block of addresses, 80H through FFH, although they are physically
separate entities.
The lower 128 bytes of RAM are present in all 80C51 devices as mapped in Fig 8-2. The lowest 32 bytes are
grouped into 4 banks of 8 registers. Program instructions call out these registers as R0 through R7. Two bits in
the Program Status Word (PSW) select which register bank is in use. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct addressing. The next 16 bytes
above the register banks form a block of bit-addressable memory space. The 80C51 instruction set includes a
wide selection of single-bit instructions, and the 128 bits in this area can be directly addressed by these
instructions. The bit addresses in this area are 00H through 7FH.
All of the bytes in the Lower 128 can be accessed by either direct or indirect addressing while the Upper 128 can
only be accessed by indirect addressing.
Figure 8-1 gives a brief look at the Special Function Register (SFR) space. SFRs include the Port latches, timers,
peripheral controls, etc. These registers can only be accessed by direct addressing. Sixteen addresses in SFR
space are both byte- and bit-addressable. The bit-addressable SFRs are those whose address ends in 0H or 8H.
To access the on-chip expanded RAM (XRAM), refer to Figure 8-1, the 256 bytes of XRAM (0000H to 00FFH)
are indirectly accessed by move external instruction, MOVX. An access to XRAM will have not any outputting of
address, address latch enable and read/write strobe.
Fig 8-2 Lower 128 Bytes of Internal RAM
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
21/84
Four banks of 8
registers R0~R7
MEGAWIN
MAKE YOU WIN
30H
20H
18H
10H
08H
00H
Lower 128 Bytes of
Bit Addressable
internal SRAM
Bank 3
Bank 2
Bank 1
Bank 0
7FH
2FH
1FH
17H
0FH
07H
Reset value of
Stack Pointer
MG82FE(L)308/316
Preliminary, v 0.04