mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 64

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mg82fel308

Manufacturer Part Number
mg82fel308
Description
A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
Manufacturer
Megawin Technology
Datasheet
SFR Address
SFR Page
Bit 7: SMOD1, double Baud rate control bit.
0: Disable double Baud rate of the UART.
1: Enable double Baud rate of the UART in mode 1, 2, or 3.
Bit 6: SMOD0, Frame Error select.
0: SCON.7 is SM0 function.
1: SCON.7 is FE function. Note that FE will be set after a frame error regardless of the state of SMOD0.
AUXR2: Auxiliary Register 2
SFR Address
SFR Page
Bit 6: T1X12, Timer 1 clock source selector while C/T=0.
0: Clear to select SYSCLK/12.
1: Set to select SYSCLK as the clock source.
Bit 5: URM0X6, Serial Port mode 0 baud rate selector.
0: Clear to select SYSCLK/12 as the baud rate for UART Mode 0.
1: Set to select SYSCLK/2 as the baud rate for UART Mode 0.
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
64/84
SMOD1
T0X12
R/W
R/W
7
7
MEGAWIN
MAKE YOU WIN
SMOD0
T1X12
= 0x87
= All
= 0x87
= All
R/W
R/W
6
6
URM0X6
R/W
--
5
R
5
POF
R/W
--
4
4
R
Reset Value = 00X1-0000
Reset Value = 0000-XX00
GF1
R/W
--
3
3
R
GF0
R/W
--
2
2
R
T1CKOE
MG82FE(L)308/316
R/W
R/W
PD
1
1
Preliminary, v 0.04
T0CKOE
IDL
R/W
R/W
0
0

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