fs6370 AMI Semiconductor, Inc., fs6370 Datasheet - Page 4

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fs6370

Manufacturer Part Number
fs6370
Description
Fs6370-01g Eeprom Programmable 3-pll Clock Generator Ic
Manufacturer
AMI Semiconductor, Inc.
Datasheet

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F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 / / F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 g g E E E E P P R R O O M M P P r r o o g g r r a a m m m m a a b b l l e e 3 3 - - P P L L L L C C l l o o c c k k G G e e n n e e r r a a t t o o r r I I C C
A A M M I I S S e e m m i i c c o o n n d d u u c c t t o o r r - - R R e e v v . . 2 2 . . 0 0 , , M M a a r r . . 0 0 5 5
For example, a fixed divide-by-eight pre-scaler could have been used in the feedback divider. Unfortunately, a divide-by-eight would limit the effective
modulus of the entire feedback divider to multiples of eight. This limitation would restrict the ability of the PLL to achieve a desired input-frequency-to-
output-frequency ratio without making both the reference and feedback divider values comparatively large. Generally, very large values are undesirable
as they degrade the bandwidth of the PLL, increasing phase jitter and acquisition time.
To understand the operation of the feedback divider, refer to Figure 4. The M-counter (with a modulus always equal to M) is cascaded with the dual-
modulus pre-scaler. The A-counter controls the modulus of the pres-caler. If the value programmed into the A-counter is A, the pre-scaler will be set to
divide by N+1 for A pre-scaler outputs. Thereafter, the prescaler divides by N until the M-counter output resets the A-counter, and the cycle begins again.
Note that N=8, and A and M are binary numbers.
Suppose that the A-counter is programmed to zero. The modulus of the pre-scaler will always be fixed at N; and the entire modulus of the feedback divider
becomes MxN.
Next, suppose that the A-counter is programmed to a one. This causes the pre-scaler to switch to a divide-by-N+1 for its first divide cycle and then revert
to a divide-by-N. In effect, the A-counter absorbs (or "swallows") one extra clock during the entire cycle of the feedback divider. The overall modulus is
now seen to be equal to MxN+1.
This example can be extended to show that the feedback divider modulus is equal to MxN+A, where A<M.
3.1.3 Feedback Divider Programming
For proper operation of the feedback divider, the A-counter must be programmed only for values that are less than or equal to the M-counter. Therefore,
not all divider moduli below 56 are available for use. This is shown in Table 2.
Above a modulus of 56, the feedback divider can be programmed to any value up to 2047.
Table 2: Feedback Divider Modulus Under 56
M M - - C C o o u u n n t t e e r r : :
F F B B K K D D I I V V [ [ 1 1 0 0 : : 3 3 ] ]
00000001
00000010
00000011
00000100
00000101
00000110
00000111
0 0 0 0 0 0
16
24
32
40
48
56
8
0 0 0 0 1 1
17
25
33
41
49
57
9
0 0 1 1 0 0
18
26
34
42
50
58
-
F F e e e e d d b b a a c c k k D D i i v v i i d d e e r r M M o o d d u u l l u u s s
A A - - C C o o u u n n t t e e r r : : F F B B K K D D I I V V [ [ 2 2 : : 0 0 ] ]
0 0 1 1 1 1
27
35
43
51
59
f
-
-
VCO
1 1 0 0 0 0
36
44
52
60
-
-
-
Prescaler
FBKDIV[2:0]
Modulus
Counter
Dual
Figure 4: Feedback Divider
1 1 0 0 1 1
A
45
53
61
-
-
-
-
4
1 1 1 1 0 0
54
62
-
-
-
-
-
FBKDIV[10:3]
1 1 1 1 1 1
63
Counter
-
-
-
-
-
-
M
f
PD
Data Sheet

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