fs6370 AMI Semiconductor, Inc., fs6370 Datasheet - Page 8

• Manufacturer Part Number: fs6370
• Description: Fs6370-01g Eeprom Programmable 3-pll Clock Generator Ic
• Manufacturer: AMI Semiconductor, Inc.

www.amis.com.
F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 / / F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 g g E E E E P P R R O O M M P P r r o o g g r r a a m m m m a a b b l l e e 3 3 - - P P L L L L C C l l o o c c k k G G e e n n e e r r a a t t o o r r I I C C
A A M M I I S S e e m m i i c c o o n n d d u u c c t t o o r r - - R R e e v v . . 2 2 . . 0 0 , , M M a a r r . . 0 0 5 5
7 7 . . 2 2 N N o o n n - - P P r r o o g g r r a a m m m m i i n n g g M M i i g g r r a a t t i i o o n n P P a a t t h h
If the design has solidified on a particular EEPROM programming pattern, the EEPROM pattern can be hard-coded into a ROM-based device. For high-
volume requirements, a ROM-based device offers significant cost savings over the FS6370. Contact an AMIS sales representative for more detail.
8.0 I
I
low corresponds to ground (V
8 8 . . 1 1 B B u u s s C C o o n n d d i i t t i i o o n n s s
Data transfer on the bus can only be initiated when the bus is not busy. During the data transfer, the data line (SDA) must remain stable whenever the
clock line (SCL) is high. Changes in the data line while the clock line is high will be interpreted by the device as a START or STOP condition. The following
bus conditions are defined by the I
8.1.1 Not Busy
Both the data (SDA) and clock (SCL) lines remain high to indicate the bus is not busy.
8.1.2 START Data Transfer
A high to low transition of the SDA line while the SCL input is high indicates a START condition. All commands to the device must be preceded by a START
condition.
8.1.3 STOP Data Transfer
A low to high transition of the SDA line while SCL is held high indicates a STOP condition. All commands to the device must be followed by a STOP
condition.
2
C-bus logic levels noted herein are based on a percentage of the power supply (V
2
C-bus Control Interface
This device is a read/write slave device meeting all Philips I
device that generates the serial clock SCL, controls bus access and generates the START and STOP conditions while the device works as a
slave. Both master and slave can operate as a transmitter or receiver, but the master device determines which mode is activated. A device
that sends data onto the bus is defined as the transmitter, and a device receiving data as the receiver.
SS
).
2
C-bus protocol.
OE/SDA
PD/SCL
(FS6370)
(FS6377)
(FS6370)
(FS6377)
OE
PD
(FS6370)
VSS
SEL_CD
XOUT
VDD
VSS
XIN
SDA
(FS6377)
Figure 5: FS6370 to FS6377
1
2
3
4
5
6
7
8
2
C-bus specifications except a "general call." The bus has to be controlled by a master
8
DD
(FS6370)
). A logic-one corresponds to a nominal voltage of V
VDD
16
15
14
13
12
11
10
9
CLK_A
VDD
CLK_B
CLK_C
VSS
CLK_D
SCL
(FS6377)
MODE
(FS6370)
ADDR
(FS6377)
DD
Data Sheet
, while a logic-