mt48h16m16lfbf-75 Micron Semiconductor Products, mt48h16m16lfbf-75 Datasheet - Page 16

• Manufacturer Part Number: mt48h16m16lfbf-75
• Description: 256mb X16, X32 Mobile Sdram
• Manufacturer: Micron Semiconductor Products

Figure 7:
Operating Mode
Write Burst Mode
Extended Mode Register (EMR)
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 2/08 EN
CAS Latency
COMMAND
COMMAND
The normal operating mode is selected by setting M7 and M8 to zero; the other combi-
nations of values for M7 and M8 are reserved for future use.
Reserved states should not be used as unknown operation or incompatibility with future
versions may result.
When M9 = 0, the BL programmed via M0–M2 applies to both READ and WRITE bursts;
when M9 = 1, the programmed BL applies to READ bursts, but write accesses are single-
location accesses.
The low-power EMR controls the functions beyond those controlled by the mode
register. These additional functions are special features of the mobile device. They
include temperature-compensated self refresh (TCSR) control, partial-array self refresh
(PASR), and output drive strength.
The low-power EMR is programmed via the MODE REGISTER SET command and
retains the stored information until it is programmed again or the device loses power.
CLK
CLK
DQ
DQ
READ
READ
T0
T0
CL = 2
NOP
NOP
T1
T1
16
t
t AC
LZ
CL = 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T2
NOP
T2
NOP
t
t AC
LZ
D
t OH
OUT
256Mb: x16, x32 Mobile SDRAM
NOP
T3
T3
D
t OH
OUT
DON’T CARE
UNDEFINED
©2006 Micron Technology, Inc. All rights reserved
Register Definition
T4