mt48h16m16lfbf-75 Micron Semiconductor Products, mt48h16m16lfbf-75 Datasheet - Page 38

• Manufacturer Part Number: mt48h16m16lfbf-75
• Description: 256mb X16, X32 Mobile Sdram
• Manufacturer: Micron Semiconductor Products

Figure 30: READ with Auto Precharge Interrupted by a WRITE
WRITE with Auto Precharge
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 2/08 EN
Internal
States
Note:
1. Interrupted by a READ (with or without auto precharge): A READ to bank m will inter-
2. Interrupted by a WRITE (with or without auto precharge): A WRITE to bank m will
COMMAND
rupt a WRITE on bank n when registered, with the data-out appearing CL later. The
precharge to bank n will begin after
bank m is registered. The last valid WRITE to bank n will be data-in registered one
clock prior to the READ to bank m (see Figure 31 on page 39).
interrupt a WRITE on bank n when registered. The precharge to bank n will begin
after
valid data WRITE to bank n will be data registered one clock prior to a WRITE to bank
m (see Figure 32 on page 39).
ADDRESS
BANK m
DQM is HIGH at T2 to prevent D
BANK n
DQM
CLK
DQ
t
WR is met, where
1
Active
Page
READ - AP
BANK n,
BANK n
COL a
T0
READ with Burst of 4
Page Active
T1
NOP
CL = 3 (bank n)
t
WR begins when the WRITE to bank m is registered. The last
T2
38
NOP
OUT
T3
D
a +1 from contending with D
NOP
OUT
a
t
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WR is met, where
BANK m,
WRITE - AP
COL d
BANK m
T4
D
d
256Mb: x16, x32 Mobile SDRAM
IN
Interrupt Burst, Precharge
WRITE with Burst of 4
T5
d + 1
NOP
D
IN
t
RP - BANK n
t
WR begins when the READ to
T6
d + 2
NOP
D
IN
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IN
DON’T CARE
d at T4.
T7
t WR - BANK m
d + 3
NOP
D
IN
Write-Back
Idle
Operations