pcf8576d NXP Semiconductors, pcf8576d Datasheet - Page 21

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pcf8576d

Manufacturer Part Number
pcf8576d
Description
Universal Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
After an acknowledgement, one or more command bytes
follow that define the status of each addressed
PCF8576D.
The last command byte sent is identified by resetting its
most significant bit, continuation bit C, (see Fig.18). The
command bytes are also acknowledged by all addressed
PCF8576Ds on the bus.
After the last command byte, one or more display data
bytes may follow. Display data bytes are stored in the
display RAM at the address specified by the data pointer
and the subaddress counter. Both data pointer and
subaddress counter are automatically updated and the
data directed to the intended PCF8576D device.
An acknowledgement after each byte is asserted only by
the PCF8576Ds that are addressed via address lines A0,
2004 Dec 22
handbook, full pagewidth
Universal LCD driver for low
multiplex rates
SDA
SCL
START condition
SDA
SCL
S
Fig.14 Definition of START and STOP conditions.
data valid
data line
stable;
Fig.13 Bit transfer.
21
allowed
change
of data
A1 and A2. After the last display byte, the I
asserts a STOP condition (P). Alternately a START may
be asserted to RESTART an I
7.8
The command decoder identifies command bytes that
arrive on the I
continuation bit C in their most significant bit position as
shown in Fig.18. When this bit is set, it indicates that the
next byte of the transfer to arrive will also represent a
command. If this bit is reset, it indicates that the command
byte is the last in the transfer. Further bytes will be
regarded as display data.
The five commands available to the PCF8576D are
defined in Table 4.
Command decoder
2
C-bus. All available commands carry a
STOP condition
MBA607
P
2
C-bus access.
MBC622
SDA
SCL
Product specification
PCF8576D
2
C-bus master

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