pca8576c NXP Semiconductors, pca8576c Datasheet - Page 23

• Manufacturer Part Number: pca8576c
• Description: Universal Lcd Driver For Low Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA8576C
Product data sheet
7.18 Command decoder
The I
condition (S) from the I
slave addresses available. All PCA8576Cs with the corresponding SA0 level
acknowledge in parallel with the slave address but all PCA8576Cs with the alternative
SA0 level ignore the whole I
After acknowledgement, one or more command bytes follow which define the status of the
addressed PCA8576Cs.
The last command byte is tagged with a cleared most significant bit, the continuation bit C.
The command bytes are also acknowledged by all addressed PCA8576Cs on the bus.
After the last command byte, a series of display data bytes may follow. These display
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically updated
and the data is directed to the intended PCA8576C device. The acknowledgement after
each byte is made only by the (A0, A1, and A2) addressed PCA8576C. After the last
display byte, the I
The command decoder identifies command bytes that arrive on the I
commands carry a continuation bit C in their most significant bit position as shown in
Figure
will also represent a command. If this bit is set logic 0, it indicates that the command byte
is the last in the transfer. Further bytes will be regarded as display data.
The five commands available to the PCA8576C are defined in
Fig 16. I
Fig 17. General format of the command byte
2
(1) C = 0; last command
(2) C = 1; commands continue
C-bus protocol is shown in
17. When this bit is set logic 1, it indicates that the next byte of the transfer to arrive
2
S
C-bus protocol
0 1 1 1 0 0
slave address
All information provided in this document is subject to legal disclaimers.
2
C-bus master issues a STOP condition (P).
1 byte
2
C-bus master which is followed by one of the two PCA8576C
Rev. 1 — 22 July 2010
S
A
0
R/W
2
MSB
C-bus transfer.
0 A C
C
Figure
acknowledge by
all addressed
n ≥ 1 byte(s)
PCA8576Cs
COMMAND
REST OF OPCODE
16. The sequence is initiated with a START
Universal LCD driver for low multiplex rates
A
msa833
DISPLAY DATA
n ≥ 0 byte(s)
LSB
Table
by A0, A1 and A2
update data pointers
subaddress counter
PCA8576C
PCA8576C only
and if necessary,
acknowledge
2
8.
selected
C-bus. All available
© NXP B.V. 2010. All rights reserved.
A
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