pca8576c NXP Semiconductors, pca8576c Datasheet - Page 34

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pca8576c

Manufacturer Part Number
pca8576c
Description
Universal Lcd Driver For Low Multiplex Rates
Manufacturer
NXP Semiconductors
Datasheet

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PCA8576C
Product data sheet
The SYNC line is provided to maintain the correct synchronization between all cascaded
PCA8576Cs. This synchronization is guaranteed after the power-on reset. The only time
that SYNC is likely to be needed is if synchronization is accidentally lost (e.g. by noise in
adverse electrical environments; or by the defining a multiplex mode when PCA8576Cs
with differing SA0 levels are cascaded).
SYNC is organized as an input/output pin; the output selection being realized as an
open-drain driver with an internal pull-up resistor. A PCA8576C asserts the SYNC line and
monitors the SYNC line at all other times. If synchronization in the cascade is lost, it is
restored by the first PCA8576C to assert SYNC. The timing relationship between the
backplane waveforms and the SYNC signal for the various drive modes of the PCA8576C
are shown in
Fig 27. Cascaded PCA8576C configuration
V
V
V
LCD
CONTROLLER
DD
PROCESSOR/
SS
MICRO-
MICRO-
HOST
R
Figure
2C
All information provided in this document is subject to legal disclaimers.
t
r
b
28.
Rev. 1 — 22 July 2010
SYNC
OSC
SDA
CLK
SCL
SYNC
SDA
SCL
CLK
OSC
A0
Universal LCD driver for low multiplex rates
A0
V
PCA8576C
DD
A1
PCA8576C
V
A1
DD
A2
A2 SAO V
V
LCD
SA0 V
V
LCD
SS
SS
40 segment drives
40 segment drives
4 backplanes
BP0 to BP3
BP0 to BP3
(open-circuit)
PCA8576C
© NXP B.V. 2010. All rights reserved.
LCD PANEL
(up to 2560
elements)
013aaa277
34 of 44

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