pca8576d NXP Semiconductors, pca8576d Datasheet - Page 30

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pca8576d

Manufacturer Part Number
pca8576d
Description
Automotive 40 X 4 Lcd Segment Driver For Low Multiplex Rates Up To 1 4
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
12. Application information
PCA8576D
Product data sheet
12.1 Cascaded operation
In large display configurations, up to 16 PCA8576D can be differentiated on the same
I
programmable I
Table 18.
The PCA8576D connected in cascade are synchronized to allow the backplane signals
from only one device in the cascade to be shared. This arrangement is cost-effective in
large LCD applications since the backplane outputs of only one device need to be
through-plated to the backplane electrodes of the display. The other cascaded PCA8576D
contribute additional segment outputs but their backplane outputs are left open-circuit
(see
All PCA8576D connected in cascade are correctly synchronized by the SYNC signal. This
synchronization is guaranteed after the power-on reset. The only time that SYNC is likely
to be needed is if synchronization is lost accidentally, for example, by noise in adverse
electrical environments, or if the LCD multiplex drive mode is changed in an application
using several cascaded PCA8576D, as the drive mode cannot be changed on all of the
cascaded devices simultaneously. SYNC can be either an input or an output signal; a
SYNC output is implemented as an open-drain driver with an internal pull-up resistor.
The PCA8576D asserts SYNC at the start of its last active backplane signal and monitors
the SYNC line at all other times. If cascade synchronization is lost, it is restored by the first
PCA8576D to assert SYNC. The timing relationship between the backplane waveforms
and the SYNC signal for each LCD drive mode is shown in
Cluster
1
2
2
C-bus by using the 3-bit hardware subaddresses (A0, A1 and A2) and the
Figure
Addressing cascaded PCA8576D
21).
Bit SA0
0
1
All information provided in this document is subject to legal disclaimers.
2
C-bus slave address (SA0).
Automotive 40 x 4 LCD segment driver for low multiplex rates
Rev. 1 — 4 April 2011
Pin A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Pin A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Figure
Pin A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
22.
PCA8576D
© NXP B.V. 2011. All rights reserved.
Device
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
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