stlc3075 STMicroelectronics, stlc3075 Datasheet - Page 13

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stlc3075

Manufacturer Part Number
stlc3075
Description
Integrated Pots Interface For Home Access Gateway And Wll
Manufacturer
STMicroelectronics
Datasheet
STLC3075
3.2.5
Once the ring trip is detected, the DET output is activated (logic level low). At this point the
card controller or a simple logic circuit stops the D2 toggling in order to effectively
disconnect the ring signal and then set the STLC3075 in the proper operating mode
(normally active).
Ring level in presence of more telephones in parallel
As already mentioned in the previous section, the maximum current that can be drawn from
the V
available at the self generated negative battery.
If for any reason the ringer load is too low, the self generated battery drops in order to keep
the power consumption to the fixed limit and consequently the ring voltage level is also
reduced.
In the typical buckboost configuration with R
limited to around 900mApk, which correspond to an average current of 700mA max. In this
condition the STLC3075 can drive up to 3REN with a ring frequency fr=25Hz
(1REN = 1800 + 1.0 F, european standard).
In order to drive up to 5REN (1REN= 6930 + 8 F, US standard) it is necessary to modify
the external components as follows:
In flyback configuration the value of R
and USA standard. In order to drive 5REN (US standard) it is necessary to modify the
external component: R
Layout recommendation
A properly designed PCB layout is a basic issue to guarantee a correct behavior and good
noise performance.
Particular care must be taken on the ground connection. Using the configurations shown on
Figure 10
The ground of the power supply (V
as SYSTEM-GND. This point should show a resistance as low as possible, that means it
should be a ground plane.
In particular to avoid noise problems the layout should prevent any coupling between the
DC/DC converter components and analog pins that are referred to AGND (ex: RD, IREF,
RTH, RLIM, VF). As a first recommendation the components CV, L, T1, D1, CV
should be kept as close as possible to each other and isolated from the other components.
Additional improvements can be obtained
POS
supply is controlled and limited via the external R
CREV = 15nF; RD = 2.2K ; R
by decoupling the center of the star from the analog ground of STLC3075 using
small chokes
by adding a capacitor in the range of 100nF between V
filter the switch frequency on V
and
Figure 11
D
= 2K2.
permits to avoid possible problems.
POS
SENSE
) has to be connected to the center of the star, named
SENSE
POS
SENSE
= 220m guarantees to match both European
= 100m .
= 110m the peak current from V
SENSE
. This also limits the power
POS
Functional description
and AGND in order to
POS
, R
POS
SENSE
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