stlc3075 STMicroelectronics, stlc3075 Datasheet - Page 6

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stlc3075

Manufacturer Part Number
stlc3075
Description
Integrated Pots Interface For Home Access Gateway And Wll
Manufacturer
STMicroelectronics
Datasheet
Pin description
6/36
Table 1.
24
25
26
27
28
29
30
31
32
33
34
35
36
37
41
43
44
GATE
R
V
CVCC
AGND
RLIM
IREF
RTH
RD
ILTF
CSVR
BGND
VBAT
RING
TIP
CREV
VBAT1
Pin description (continued)
POS
SENSE
Pin
Driver for external power MOS transistor (P-channel in buckboost
configuration, N-channel in flyback configuration).
Voltage input for current sensing. R
close to this pin and V
layout should minimize the extra resistance introduced by the copper
tracks.
Positive supply input
Internal positive voltage supply filter
Analog ground. Must be shorted with BGND.
Constant current feed programming pin (via RLIM). RLIM should be
connected close to this pin and AGND pin to avoid noise injection.
Internal bias current setting pin. RREF should be connected close to this
pin and AGND pin to avoid noise injection.
Off-hook threshold programming pin (via RTH). RTH should be connected
close to this pin and AGND pin to avoid noise injection.
DC feedback and ring trip input. RD should be connected close to this pin
and AGND pin to avoid noise injection.
Transversal line current image output
Battery supply filter capacitor
Battery ground, must be shorted with AGND
Regulated battery voltage self generated by the device via DC/DC
converter. Must be shorted to VBAT1.
2 wire ports; RING wire (Ib is the current sunk into this pin)
2 wire ports; TIP wire (Ia is the current sourced from this pin)
Reverse polarity transition time control. A proper capacitor connected
between this pin and AGND is setting the reverse polarity transition time.
This is the same transition time used to shape the ’trapezoidal ringing’
during ringing injection.
Frame connection. Must be shorted to VBAT
POS
pin (Buckboost) or GND (Flyback). The PCB
Function
SENSE
resistor should be connected
STLC3075

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