adc12ds105cisq National Semiconductor Corporation, adc12ds105cisq Datasheet - Page 13

• Manufacturer Part Number: adc12ds105cisq
• Description: Dual 12-bit, 105 Msps A/d Converter With Serial Lvds Outputs
• Manufacturer: National Semiconductor Corporation

LVDS DC CHARACTERISTICS
V
delta
V
V
delta V
IOS
LVDS OUTPUT TIMING AND SWITCHING CHARACTERISTICS
t
t
t
t
t
t
t
t
t
t
Symbol
DP
HO
SUO
FP
FDC
DFS
R
ODOR
DLD
SD
OD
OD
OS
, t
ADC12DS105 LVDS Electrical Characteristics
Unless otherwise specified, the following specifications apply: AGND = DRGND = 0V, V
f
amplitude. Boldface limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
guaranteed to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under
the listed test conditions. Operation of the device beyond the maximum Operating Ratings is not recommended.
Note 2: This parameter is specified in units of dBFS - indicating the value that would be attained with a full-scale input signal.
Note 3: All voltages are measured with respect to GND = AGND = DRGND = 0V, unless otherwise specified.
Note 4: When the input voltage at any pin exceeds the power supplies (that is, V
±50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of ±5 mA to 10.
Note 5: The maximum allowable power dissipation is dictated by T
can be calculated using the formula P
operated in a severe fault condition (e.g. when input or output pins are driven beyond the power supply voltages, or the power supply polarity is reversed). Such
conditions should always be avoided.
Note 6: Human Body Model is 100 pF discharged through a 1.5 kΩ resistor. Machine Model is 220 pF discharged through 0 Ω
Note 7: Reflow temperature profiles are different for lead-free and non-lead-free packages.
Note 8: The inputs are protected as shown below. Input voltage magnitudes above V
(Note 4)
Note 9: With a full scale differential input of 2V
CLK
F
= 105 MHz, V
OS
. However, errors in the A/D conversion can occur if the input goes above 2.6V or below GND as described in the Operating Ratings section.
Output Differential Voltage
(SDO+) - (SDO-)
Output Differential Voltage Unbalance
Offset Voltage
Offset Voltage Unbalance
Output Short Circuit Current
Output Data Bit Period
Output Data Edge to Output Clock Edge
Hold Time(Note 13)
Output Data Edge to Output Clock Edge
Set-Up Time(Note 13)
Frame Period
Frame Clock Duty Cycle(Note 13)
Data Edge to Frame Edge Skew
LVDS Rise/Fall Time
Output Delay of OR output
Serializer DLL Lock Time
Serializer Delay
CM
= V
Parameter
CMO
, C
D,max
L
= 5 pF/pin. Typical values are for T
= (T
P-P
J,max
MIN
, the 12-bit LSB is 488 µV.
- T
≤
A
T
)/θ
A
JA
≤
. The values for maximum power dissipation listed above will be reached only when the device is
R
R
R
R
DO = 0V, V
Single-Lane Mode
Dual-Lane Mode
Single-Lane Mode
Dual-Lane Mode
Single-Lane Mode
Dual-Lane Mode
Single-Lane Mode
Dual-Lane Mode
50% to 50%
C
From rising edge of CLKL to ORA/ORB
valid
R
T
L
L
L
L
L
L
MAX
=5pF to GND, R
=100Ω
= 100Ω
= 100Ω
= 100Ω
= 100Ω
J,max
. All other limits apply for T
, the junction-to-ambient thermal resistance, (θ
IN
13
= 1.1V,
Conditions
IN
A
< AGND, or V
= 25°C. Timing measurements are taken at 50% of the signal
A
OUT
20211711
or below GND will not damage this device, provided current is limited per
=100Ω
IN
> V
A
A
), the current at that pin should be limited to ±5 mA. The
= 25°C (Notes 8, 9)
A
= V
DR
(Note 10)
JA
Typical
19.05
), and the ambient temperature, (T
= +3.3V, Internal V
1.25
0.79
1.59
9.52
TBD
TBD
TBD
TBD
350
195
595
195
595
-10
50
4
Limits
1.125
1.375
250
450
±25
±25
45
55
REF
www.national.com
mV (max)
mV (max)
mV (max)
mA (max)
= +1.2V,
mV (min)
ps (max)
ps (max)
% (max)
(Limits)
V (max)
% (min)
V (min)
Units
ns
ps
ps
ns
ns
µs
ns
A
), and