adc16061ccvt National Semiconductor Corporation, adc16061ccvt Datasheet - Page 12

• Manufacturer Part Number: adc16061ccvt
• Description: Self-calibrating 16-bit, 2.5 Msps, 390 Mw A/d Converter
• Manufacturer: National Semiconductor Corporation

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Typical Performance Characteristics
Specification Definitions
APERTURE DELAY is the time required after the falling
edge of the clock for the sampling switch to open. The
Track/Hold circuit effectively stops capturing the input signal
and goes into the "hold" mode t
APERTURE JITTER is the variation in aperture delay from
sample to sample. Aperture jitter shows up as input noise.
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of
the maximum deviation from the ideal step size of 1 LSB.
EFFECTIVE NUMBER OF BITS (ENOB, or EFFECTIVE
BITS) is another method of specifying Signal-to-Noise and
Distortion Ratio, or SINAD. ENOB is defined as (SINAD
−1.76) / 6.02 and says that the converter is equivalent to an
ideal ADC of this (ENOB) number of bits.
FULL SCALE ERROR is the difference between the input
voltage [(V
full scale and V
(V
FULL POWER BANDWIDTH is a measure of the frequency
at which the reconstructed output fundamental drops 3 dB
below its low frequency value for a full scale input.
INTERMODULATION DISTORTION (IMD) is the creation of
additional spectral components as a result of two sinusoidal
frequencies being applied to the ADC input at the same time.
It is defined as the ratio of the power in the first and second
order intermodulation products to the total power in one of
the original frequencies. IMD is usually expressed in dB.
INTEGRAL NON-LINEARITY (INL) is a measure of the
deviation of each individual code from a line drawn from
negative full scale (
through positive full scale (the last code transition). The
deviation of any given code from this straight line is mea-
sured from the center of that code value.
MISSING CODES are those output codes that are skipped
and will never appear at the ADC outputs. These codes can
not be reached by any input value.
REF
−
IN
).
IN
+) − (V
REF
IN
− 1.5 LSB, where V
1
Spectral Response
⁄
−)] just causing a transition to positive
2
LSB below the first code transition)
AD
after the fall of the clock.
REF
is ( V
10088933
REF
+
IN
) −
12
(Continued)
OUTPUT DELAY is the time delay after the falling edge of
the input clock before the data update is present at the
output pins.
PIPELINE DELAY (LATENCY) is the number of clock cycles
between initiation of conversion and when that data is pre-
sented to the output stage. Data for any given sample is
available the Pipeline Delay plus the Output Delay after that
sample is taken. New data is available at every clock cycle,
but the data lags the conversion by the pipeline delay.
POWER SUPPLY REJECTION RATIO (PSRR) is a mea-
sure of how well an a.c. signal riding upon the power supply
is rejected at the output. PSRR is measured with 10MHz,
250mV
the output amplitude of that signal to its amplitude on the
power supply. PSRR is expressed in dB.
SIGNAL TO NOISE RATIO (SNR) is the ratio, expressed in
dB, of the rms value of the input signal to the rms value of the
sum of all other spectral components below one-half the
sampling frequency, not including harmonics or d.c.
SIGNAL TO NOISE PLUS DISTORTION (S/(N+D) or SI-
NAD)) is the ratio, expressed in dB, of the rms value of the
input signal to the rms value of all of the other spectral
components below half the clock frequency, including har-
monics but excluding d.c.
SPURIOUS FREE DYNAMIC RANGE (SFDR) is the differ-
ence, expressed in dB, between the rms values of the input
signal and the peak spurious signal, where a spurious signal
is any signal present in the output spectrum that is not
present at the input.
TOTAL HARMONIC DISTORTION (THD) is the ratio, ex-
pressed in dB or dBc, of the rms total of the first six harmonic
components, to the rms value of the input signal.
ZERO ERROR is the difference between the ideal differen-
tial input voltage (
just causes an transition from an output code of 32767 to an
output code of 32768.
P-P
riding upon the power supply and is the ratio of
1
⁄
2
LSB) and the actual input voltage that