adc16061ccvt National Semiconductor Corporation, adc16061ccvt Datasheet - Page 14

• Manufacturer Part Number: adc16061ccvt
• Description: Self-calibrating 16-bit, 2.5 Msps, 390 Mw A/d Converter
• Manufacturer: National Semiconductor Corporation

www.national.com
Functional Description
Operating on a single +5V supply, the ADC16061 uses a
pipeline architecture and has error correction circuitry and a
calibration mode to help ensure maximum performance at all
times.
Balanced analog signals with a peak-to-peak voltage equal
to the input reference voltage, V
the common mode input voltage, V
(15 bits plus sign). Neglecting offsets, positive input signal
voltages (V
data and negative input signal voltages (V
produce negative output data. The input signal can be digi-
tized at any clock rate between 300 Ksps and 2.5 Msps.
Input voltages below the negative full scale value will cause
the output word to take on the negative full scale value of
1000,0000,0000,0000. Input voltage above the positive full
scale value will cause the output word to take on the positive
full scale value of 0111,1111,1111,1111.
The output word rate is the same as the clock frequency. The
analog input voltage is acquired at the falling edge of the
clock and the digital data for that sample is delayed by the
pipeline for 13 clock cycles plus t
output is undefined if the chip is being reset or is in the
calibration mode. The output signal may be inhibited by the
RD pin while the converter is in one of these modes.
The RD pin must be low to enable the digital outputs. A logic
low on the power down (PD) pin reduces the converter
power consumption to less than two milliwatts.
Applications Information
1.0 OPERATING CONDITIONS
We recommend that the following conditions be observed for
operation of the ADC16061:
1.1 The Analog Inputs
The ADC16061 has two analog signal inputs, V
These two pins form a balanced input. There are two refer-
ence pins, V
ential input reference.
1.2 Reference Inputs
V
effective reference voltage, V
these two voltages:
The operational voltage range of V
+3.0 Volts. The operational voltage range of V
ground to 1.0V. For best performance, the difference be-
tween V
of 1.8V to 2.2V. Reducing the reference voltage below 1.8V
will decrease the signal-to-noise ratio (SNR) of the
ADC16061. Increasing the reference voltage (and, conse-
quently, the input signal swing) above 2.2V will increase
THD.
REF
+
4.75V ≤ V
5.25V ≤ V
3.0V ≤ V
0.3MHz ≤ f
V
V
V
CM
REF IN
REF IN
IN
REF
should always be more positive than V
= 2.0V
IN
+
REF
+ = 2.0V
− = AGND
+ − V
IN
V
D
A
D
REF
and V
+
I/O ≤ V
CLK
≤ 5.25V
≤ 5.25V
IN
IN
= (V
≤ 2.5 MHz
and V
− ≥ 0) produce positive digital output
REF
D
REF
−
REF
IN
+
should remain within the range
REF
IN
−
) − (V
IN
, is the difference between
REF
. These pins form a differ-
CM
REF
DATA_VALID
, and centered around
, are digitized to 16 bits
REF
+
−
IN
IN
IN
is +1.8 Volts to
).
+ − V
IN
. The digital
REF
+ and V
REF
−
IN
−
−
IN
. The
<
IN
IN
0)
−.
is
14
V
resistors to be 40% of the V
bypassed to AGND with a 0.05µF to 0.1µF capacitor. Alter-
natively, drive this pin to a stable 2.0V with a low impedance
source.
V
buffer outputs. The voltage at V
V
are V
V
V
from and equal to V
are brought out only to be by passed. Bypass this pin with
0.1µF capacitor to ground. Do not load these pins.
It is very important that all grounds associated with the
reference voltage make connection to the ground plane at a
single, quiet point to minimize the effects of noise currents in
the ground path.
1.3 Signal Inputs
The signal inputs are V
is defined as
Figure 3 indicates the relationship between the input voltage
and the reference voltages. Figure 4 shows the expected
input signal range.
CM
REF+ OUT
CM
REF
REF (MID)
FIGURE 3. Typical Input to Reference Relationship.
, the input common mode voltage, is set with on-board
(2.0V), while the voltages at V
REF
is as described above.
FIGURE 4. Expected Input Signal Range.
above and below below V
is the reference output mid-point and is derived
and V
V
V
REF− OUT
REF+ OUT
REF− OUT
V
CM
IN
. V
= (V
IN
REF+ OUT
+ and V
and V
= V
= V
A
IN
supply voltage. This pin should
+) − (V
CM
CM
REF+ MID
REF+ MID
IN
, V
+
−
REF+ OUT
CM
−. The signal input, V
1
1
REF− OUT
IN
10088918
⁄
⁄
2
2
−).
V
V
such that
is nominally equal to
REF
REF
are the reference
.
.
10088917
and V
and V
REF− OUT
REF (MID)
IN
,