adc16061ccvt National Semiconductor Corporation, adc16061ccvt Datasheet - Page 16

• Manufacturer Part Number: adc16061ccvt
• Description: Self-calibrating 16-bit, 2.5 Msps, 390 Mw A/d Converter
• Manufacturer: National Semiconductor Corporation

www.national.com
Applications Information
3.0 OUTPUTS
The ADC16061 has four analog outputs: V
V
puts: EOC (End of Conversion) and 16 Data Output pins.
3.1 The reference output voltages are made available only
for the purpose of bypassing with capacitors. These pins
should not be loaded with more than 10 µA DC. These output
voltages are described in Section 1.3
3.2 The EOC output goes low to indicate the presence of
valid data at the output data lines. Valid data is present the
entire time that this signal is low, except during reset. Corrupt
or irrelevant data may appear at the data outputs when the
RESET pin or the CAL pin is high.
3.3 The Data Outputs are TTL/CMOS compatible. The out-
put data format is two’s complement. Valid data is present at
these outputs while the EOC pin is low. While the t
and the t
timing, a simple way to capture a valid output is to latch the
data on the rising edge of the CLOCK (pin 10).
Also helpful in minimizing noise due to output switching is to
minimize the load currents at the digital outputs. This can be
done by connecting buffers between the ADC outputs and
any other circuitry. Only one input should be connected to
each output pin. Additionally, inserting series resistors of 47
or 56 Ohms at the digital outputs, close to the ADC pins, will
isolate the outputs from other circuitry and limit output cur-
rents. (See Figure 6).
REF
−
OUT
DATA_VALID
, V
REF (MID)
time provide information about output
FIGURE 6. Simple application circuit with single-ended to differential buffer.
and V
CM
. There are 17 digital out-
(Continued)
REF
EOCL
+
OUT
time
,
16
4.0 POWER SUPPLY CONSIDERATIONS
Each power supply pin should be bypassed with a parallel
combination of a 10 µF capacitor and a 0.1 µF ceramic chip
capacitor. The chip capacitors should be within
of the power pins. Leadless chip capacitors are preferred
because they provide low lead inductance.
While a single 5V source is used for the analog and digital
supplies of the ADC16061, these supply pins should be well
isolated from each other to prevent any digital noise from
being coupled to the analog power pins. Supply isolation
with ferrite beads is shown in Figure 6 and Figure 8.
As is the case with all high-speed converters, the ADC16061
is sensitive to power supply noise. Accordingly, the noise on
the analog supply pin should be kept below 15 mV
No pin should ever have a voltage on it that is in excess of
the supply voltages, not even during power up or power
down.
The V
operated from a supply in the range of 2.7V to the V
(nominal 5V). This can simplify interfacing to 3.0 Volt devices
and systems. Powering V
power consumption and noise generation due to output
switching. DO NOT operate the V
than V
D
D
I/O provides power for the output drivers and may be
or V
A
.
D
I/O from 3 Volts will also reduce
D
I/O at a voltage higher
10088919
1
⁄
2
centimeter
P-P
D
supply
.