tda8757c NXP Semiconductors, tda8757c Datasheet - Page 19

• Manufacturer Part Number: tda8757c
• Description: Tda8757c Triple 8-bit Adc 205 Msps
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 10111
Preliminary data
9.1.3 Coarse and Fine registers
The default programmed value is:
The coarse register enables the gain control and the AGC gain. The fine register
controls the reference voltage, control pins SW1 and SW2, and the power-down
mode.
The coarse register programming equation is as follows:
Where: V
The gain correspondence is given in
programming code (N
Table 6:
The default programmed value is as follows:
To modulate this gain, the fine register is programmed using the above equation. With
a full-scale ADC input, the fine register resolution is a
(see
Table 7:
The default programmed value is: N
In addition bit PWD (in register FINER) sets the device into power-down mode as well
as the data and clock outputs into high-impedance:
GAIN
N
32
99
N
0
31
•
•
•
•
•
•
COARSE
FINE
PWD = 0: chip active
PWD = 1: chip in power-down mode and data and clock outputs in high-impedance.
Programmed code = 127
Clamp code = 0
ADC output = 0.
N
Gain = 0.825
V
i
COARSE
Table 7
to be full-scale = 1.212.
=
ref
----------------------------------------------- -
V
Typical gain correspondence (COARSE)
Typical gain correspondence (FINE)
= 2.5 V.
= 32
ref
for N
N
COARSE
1
COARSE
Rev. 01 — 14 August 2002
–
----------------- -
32 16
N
FINE
+
FINE
1
= 32).
= 0).
Gain
0.825
2.5
Gain
0.825
0.878
----- -
16
1
=
FINE
Table
----------------------------------------------- -
V
= 0.
ref
N
6. The gain is linear with reference to the
. 512 N
COARSE
–
+
FINE
1
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
1
2
V
1.212
0.4
V
1.212
1.139
Triple 8-bit ADC 205 Msps
LSB peak-to-peak
i
i
to be full-scale (V)
to be full-scale (V)
32
TDA8757C
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