tda8757a NXP Semiconductors, tda8757a Datasheet - Page 17

• Manufacturer Part Number: tda8757a
• Description: Tda8757a Triple 8-bit Adc 205 Msps
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9. I
Table 4:
9397 750 09549
Preliminary data
Function
name
SUBADDR
OFFSETR X
COARSER X
FINER
OFFSETG X
COARSEG X
FINEG
OFFSETB
COARSEB X
FINEB
CONTROL X
VCO
DIVIDER
(LSB)
PHASE
DEMUX
2
C-bus and 3W-bus interfaces
I
2
C-bus and 3W-bus registers
Subaddress
A7 A6 A5 A4 A3 A2 A1 A0 MSB
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
9.1.1 Subaddress
9.1.2 Offset register
X
X
X
X
X
X
X
X
X
X
X
X
X
X
9.1 Register definitions
X
X
X
X
X
X
X
X
X
X
X
X
X
X
The configuration of the registers is given in
All the registers are defined by a subaddress of 7 bits: bit Mode refers to the mode
which is used with the I
each register.
Bit Mode, used only with the I
Mode 0
Mode 1
The default values correspond to a VESA 1280
This register controls the clamp level for the RGB channels. The relationship between
the programming code and the level of the clamp code is given in
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
Each register is programmed independently, by giving its subaddress
and its content.
All the registers are programmed one after the other, by giving this initial
condition (XXX1 1111) as the subaddress state; thus, the registers are
changed following the predefined sequence of 16 bytes (from
subaddress 0000 to 1101).
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bit definition
X
Or7
Or8
X
Og7
Og8
X
Ob7
Ob8
X
Vlevel Hlevel
Z2
Di8
Di0
Blk
Rev. 01 — 22 March 2002
2
C-bus interface, bits ‘Sa3’ to ‘Sa0’ give the subaddress of
X
Or6
Cr6
Testvol Testvoh Fr4
Og6
Cg6
X
Ob6
Cb6
X
Z1
Di7
Ckrs
Shpixel Ckrp
2
C-bus, allows two modes for the programming:
X
Or5
Cr5
Og5
Cg5
Slevel
Ob5
Cb5
Cken
Edge
Z0
Di6
Ckext
Mode Sa3
Or4
Cr4
Og4
Cg4
Fg4
Ob4
Cb4
Fb4
Up
Vco1 Vco0 Di11
Di5
P4
Ckdp Ckdd Shift
Table
Or3
Cr3
Fr3
Og3
Cg3
Fg3
Ob3
Cb3
Fb3
Do
Di4
P3
1024 at 75 Hz graphic mode.
4.
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Sa2
Or2
Cr2
Fr2
Og2
Cg2
Fg2
Ob2
Cb2
Fb2
Ip2
Di3
P2
Triple 8-bit ADC 205 Msps
Sa1
Or1
Cr1
Fr1
Og1
Cg1
Fg1
Ob1
Cb1
Fb1
Ip1
Di10
Di2
P1
Odda Dmx
TDA8757A
Table
LSB
Sa0
Or0
Cr0
Fr0
Og0
Cg0
Fg0
Ob0
Cb0
Fb0
Ip0
Di9
Di1
P0
5.
Default
value
XXX1 0000
0111 1111
0010 0000
X000 0000
0111 1111
0010 0000
XX00 0000
0111 1111
0010 0000
XX00 0000
0000 0111
1011 1011
0100 1100
0000 0000
1000 0111
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