tda8000t NXP Semiconductors, tda8000t Datasheet - Page 5

• Manufacturer Part Number: tda8000t
• Description: Smart Card Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. V
contacts remain inactive during power-up or power-down,
provided V
P
The logic part is powered first and is in the reset condition
until V
reaches V
P
When V
the contacts is performed.
Voltage supervisor
This block surveys the 5 V supply of the microcontroller
(V
any transients on card contacts during power-up or
power-down of V
The voltage supervisor remains active even if V
powered-down.
P
As long as V
connected to the pin DELAY, will be discharged. When
V
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the pin DELAY reaches V
P
If V
and ALARM become active, and an automatic deactivation
of the contacts is performed.
Clock circuitry (see Fig.4)
The clock signal (CLK) can be applied to the card by two
different methods:
1. Generation by a crystal oscillator: the crystal
2. Use of a signal frequency already present in the
1996 Dec 12
OWER
OWER
OWER
SUP
OWER
SUP
Smart card interface
SUP
(3 to 11 MHz) is connected to pin XTAL. Its frequency
is divided by two.
system and connected to the pin CLKIN (up to 8 MHz).
Pin XTAL has to be connected to GND via a 1 k
resistor. In this event, the CLKOUT signal remains
LOW.
rises to the threshold level, C
) in order to deliver a defined reset pulse and to avoid
DD
-
-
-
-
falls below V
UP
DOWN
UP
DOWN
DD
reaches V
th4
DD
falls below V
SUP
+ V
DD
does not rise or fall too fast (0.5 V/ms typ.).
(see Fig.3)
hys4
and GND are the supply pins. All card
is below V
SUP
th1
.
th2
.
. The sequencer is blocked until V
, C
th4
DEL
, an automatic deactivation of
th2
will be discharged, ALARM
+ V
hys2
DEL
the capacitor C
will be recharged.
DD
is
DEL
th3
DD
.
,
5
In both events the signal is buffered and enabled.
Pin CLKOUT may be used to clock a microcontroller.
The signal (
when the circuit is powered up.
State diagram
Once activated, the circuit has six possible modes of
operation:
Figure 5 shows how these modes are accessible.
I
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session:
The OFF line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present.
A
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the START line
(active LOW). The I/O( C) signals must not be LOW.
The internal circuitry is activated, the internal clock starts
and the following ISO 7816 sequence is performed:
1. V
2. I/Os are enabled
3. V
4. No change
5. CLK is enabled
6. RST is enabled.
The typical time interval between two steps is 32 s for the
first two steps and 64 s for the other three. Timing is
derived from the internal clock (see Fig.6).
DLE MODE
CTIVATION SEQUENCE
Idle
Activation
Read
Write
Deactivation
Fault.
All card contacts are inactive
Voltage generators are stopped
Oscillator is running, providing CLKOUT
Voltage supervisor is active
Pins I/O1( C) and I/O2( C) are high impedance.
CC
PP
rises from 0 to 5 V
rises from 0 to 5 V
1
2
f
xtal
or f
xtal
TDA8000; TDA8000T
if CLKDIV is HIGH) is available
Product specification