tda8374bh NXP Semiconductors, tda8374bh Datasheet - Page 14

• Manufacturer Part Number: tda8374bh
• Description: Tda837x Family I?c-bus Controlled Economy Pal/ntsc And Ntsc Tv-processors
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Sound circuit
The sound band-pass and trap filters have to be
connected externally. The filtered intercarrier signal is fed
to a limiter circuit and is demodulated by a PLL
demodulator. This PLL circuit automatically tunes to the
incoming carrier signal, hence no adjustment is required.
The volume is controlled via the I
capacitor has to be connected externally.
The non-controlled audio signal can be obtained from this
pin (pin 55) (via a buffer stage).
The FM demodulator can be muted via the I
function can be used to switch-off the sound during a
channel change so that high output peaks are prevented
(also on the de-emphasis output).
The TDA8373 and TDA8374 contain an Automatic Volume
Levelling (AVL) circuit which automatically stabilizes the
audio output signal to a certain level which can be set by
the user via the volume control. This function prevents big
audio output fluctuations due to variations of the
modulation depth of the transmitter. The AVL function can
be activated via the I
1997 Jul 01
handbook, full pagewidth
I
and NTSC TV-processors
2
C-bus controlled economy PAL/NTSC
IDENTIFICATION
TDA837x
VIDEO
IDENT
2
C-bus.
Fig.7 Configuration CVBS switch and interfacing of video identification.
2
VIM
C-bus. The de-emphasis
CVBS int
S0
2
13
C-bus. This
S0
S5
CVBS ext
S1
14
17
S1
Synchronization circuit
The sync separator is preceded by a controlled amplifier
which adjusts the sync pulse amplitude to a fixed level.
These pulses are fed to the slicing stage which operates at
50% of the amplitude.
The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and can also be used for transmitter
identification. The circuit can be made less sensitive by
using the STM bit. This mode can be used during search
tuning to ensure that the tuning system will not stop at very
weak input signals. The first PLL has a very high static
steepness so that the phase of the picture is independent
of the line frequency.
The line oscillator operates at twice the line frequency.
The oscillator capacitor is internal. Because of the spread
of internal components an automatic calibration circuit has
been added to the IC. The circuit compares the oscillator
frequency with that of the crystal oscillator in the colour
decoder.
S6
CVBS/Y
S2
11
S3
S7
CHROMA
S4
10
S8
TDA837x family
CVBSO
Preliminary specification
to luminance/
sync processing
to chrominance
processing
38
MGK301