tda8374bh NXP Semiconductors, tda8374bh Datasheet - Page 15

• Manufacturer Part Number: tda8374bh
• Description: Tda837x Family I?c-bus Controlled Economy Pal/ntsc And Ntsc Tv-processors
• Manufacturer: NXP Semiconductors

Philips Semiconductors
This results in a free-running frequency which deviates
less than 2% from the typical value. When the IC is
switched on the horizontal output signal is suppressed and
the oscillator is calibrated as soon as all subaddress bytes
have been sent. When the frequency of the oscillator is
correct the horizontal drive signal is switched on. To obtain
a smooth switching on and switching off behaviour of the
horizontal output stage the horizontal output frequency is
doubled during switch-on and switch-off (slow start/stop).
During that time the duty cycle of the output pulse has such
a value that maximum safety is obtained for the output
stage.
To protect the horizontal output transistor, the horizontal
drive is immediately switched off (via the slow stop
procedure) when a power-on reset is detected. The drive
signal is switched on again when the normal switch-on
procedure is followed, i.e. all subaddress bytes must be
sent and, after calibration, the horizontal drive signal will
be released again via the slow start procedure.
When the coincidence detector indicates an out-of-lock
situation the calibration procedure is repeated.
The circuit has a second control loop to generate the drive
pulses for the horizontal driver stage. The horizontal
output is gated with the flyback pulse so that the horizontal
output transistor cannot be switched on during the flyback
time.
Adjustments can be made to the horizontal shift, vertical
shift, vertical slope, vertical amplitude and the S-correction
via the I
and TDA8377 the E-W drive can also be adjusted via the
I
adjustment possibility for the vertical and horizontal
deflection. When the horizontal scan is reduced to display
4 : 3 pictures on a 16 : 9 picture tube an accurate video
blanking can be switched on to obtain well defined edges
on the screen. The geometry processor has a differential
output for the vertical drive signal and a single-ended
output for the E-W drive (TDA8375A, TDA8377A,
TDA8375 and TDA8377). Overvoltage conditions (X-ray
protection) can be detected via the EHT tracking pin.
When an overvoltage condition is detected the horizontal
output drive signal will be switched off via the slow stop
procedure. However, it is also possible that the drive is not
switched off and that just a protection indication is given in
the I
bit PRD. The ICs have a second protection input on the
phase-2 filter capacitor pin. When this input is activated the
drive signal is switched off immediately (without slow stop)
and switched on again via the slow start procedure.
1997 Jul 01
2
C-bus. The TDA8375 and TDA8377 have a flexible zoom
I
and NTSC TV-processors
2
2
C-bus controlled economy PAL/NTSC
C-bus output byte. The choice is made via the input
2
C-bus. In the TDA8375A, TDA8377A, TDA8375
15
For this reason this protection input can be used as ‘flash
protection’.
The drive pulses for the vertical sawtooth generator are
obtained from a vertical countdown circuit. This countdown
circuit has various windows depending on the incoming
signal (50 or 60 Hz and standard or non-standard).
The countdown circuit can be forced in various modes via
the I
countdown circuit during a channel change the divider can
be forced in the search window using the NCIN bit.
The vertical deflection can be set in the de-interlace mode
via the I
To avoid damage of the picture tube when the vertical
deflection fails, the guard output current of the TDA8350
and TDA8351 can be supplied to the beam current limiting
input. When a failure is detected the RGB outputs are
blanked and a bit is set (NDF) in the status byte of the
I
connected this guard circuit will also blank the output
signals. This can be overruled using the EVG bit.
Chrominance and luminance processing
The circuit contains a chrominance band-pass and trap
circuit. The filters are realized by using gyrator circuits.
They are automatically calibrated by comparing the tuning
frequency with the crystal frequency of the decoder.
The luminance delay line and the delay for the peaking
circuit are also realized by using gyrator circuits.
The centre frequency of the chrominance band-pass filter
is 10% higher than the subcarrier frequency. This
compensates for the high frequency attenuation of the IF
saw filter. During SECAM reception the centre frequency
of the chrominance trap is reduced to obtain a better
suppression of the SECAM carrier frequencies. All ICs
have a black stretcher circuit which corrects the black level
for incoming video signals which have a deviation between
the black level and the blanking level (back porch).
The TDA8375A, TDA8377A, TDA8375 and TDA8377
have a defeatable coring function in the peaking circuit.
Some of the ICs have a YUV interface so that picture
improvement ICs such as the TDA9170 (contrast
improvement), TDA9177 (sharpness improvement) and
TDA4556 and TDA4566 (CTI) can be applied. When the
TDA4556 or TDA4566 is applied it is possible to increase
the gain of the luminance channel by using the GAI bit in
subaddress 03 so that the resulting RGB output signals
will not be affected.
2
C-bus. When no vertical deflection output stage is
2
C-bus. To obtain short switching times of the
2
C-bus.
TDA837x family
Preliminary specification