tda8374bh NXP Semiconductors, tda8374bh Datasheet - Page 29
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tda8374bh
Manufacturer Part Number
tda8374bh
Description
Tda837x Family I?c-bus Controlled Economy Pal/ntsc And Ntsc Tv-processors
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8374BH.pdf
(72 pages)
- Current page: 29 of 72
- Download datasheet (361Kb)
Philips Semiconductors
1997 Jul 01
IF
Timing of IF-AGC with a 2.2 F capacitor (pin 53)
t
t
I
Tuner take-over adjustment (via I
V
V
Tuner control output (pin 54)
V
V
I
I
AFC
RES
w
w
V
t
res(IFinc)
res(IFdec)
53
oAGC(max)
LI(RF)
d
V
i(min)(rms)
i(max)(rms)
oAGC(max)
o(sat)
IDEO IDENTIFICATION OUTPUT
sen
senL
I
and NTSC TV-processors
SYMBOL
2
AND TUNER
i
C-bus controlled economy PAL/NTSC
AFC
OUTPUT
(
AGC; note 12
VIA
modulated video interference
response time to an IF input
signal amplitude increase of
52 dB
response to an IF input signal
amplitude decrease of 52 dB
allowed leakage current of the
AGC capacitor
minimum starting level for tuner
take-over (RMS value)
maximum starting level for tuner
take-over (RMS value)
maximum tuner AGC output
voltage
output saturation voltage
maximum tuner AGC output
swing
leakage current RF AGC
input signal variation for a
control current variation of 1 mA
AFC resolution
window sensitivity
window sensitivity in large
window mode
delay time of identification after
the AGC has stabilized on a
new transmitter
I
2
C-
BUS
PARAMETER
); note 13
(
VIA
2
I
C-bus)
2
C-
BUS
)
30% AM for 1 to 100 mV;
0 to 200 Hz (system B/G)
positive (when available)
and negative modulation
negative modulation
positive modulation (when
available)
negative modulation
positive modulation (when
available)
maximum tuner gain;
note 2
minimum tuner gain;
I
54
= 2 mA
CONDITIONS
29
40
5
0.5
65
195
MIN.
2
50
100
0.4
80
2
2
80
240
TYP.
TDA837x family
Preliminary specification
10
10
200
0.8
V
300
1
4
100
300
10
P
MAX.
+ 1
%
ms
ms
ms
nA
mV
mV
V
mV
mA
dB
bits
kHz
kHz
ms
UNIT
A
A
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