uda1325 NXP Semiconductors, uda1325 Datasheet - Page 16

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uda1325

Manufacturer Part Number
uda1325
Description
Universal Serial Bus Usb Codec
Manufacturer
NXP Semiconductors
Datasheet

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Table 8 ADAC general control registers
Soft mute control
When the mute (bit 1 of control register 0) is active for the playback channel, the value of the sample is decreased
smoothly to zero following a raised cosine curve. There are 32 coefficients used to step down the value of the data, each
one being used 32 times before stepping to the next. This amounts to a mute transition of 23 ms at f
the mute is released, the samples are returned to the full level again following a raised cosine curve with the same
coefficients being used in reversed order.
The mute, on the master channel is synchronized to the sample clock, so that operation always takes place on complete
samples.
1999 May 10
Control register 0
Control register 1
Universal Serial Bus (USB) CODEC
REGISTER
6 and 5 audio mode
1 and 0 serial I
3 and 2 digital PLL mode
6 and 5 digital PLL lock speed
BIT
0
1
2
3
4
7
4
7
reset ADAC
soft mute control
synchronous/asynchronous
channel manipulation
de-emphasis
selecting bit
digital PLL lock mode
selecting bit
2
S-bus input format
DESCRIPTION
16
0 = not reset
1 = reset
0 = not muted
1 = mutes
0 = asynchronous
1 = synchronous
0 = L -> L, R -> R
1 = L -> R, R -> L
0 = de-emphasis off
1 = de-emphasis on
00 = flat mode
01 = min. mode
10 = min. mode
11 = max. mode
0
00 = I
01 = 16-bit LSB justified
10 = 18-bit LSB justified
11 = 20-bit LSB justified
00 = adaptive
01 = fix state 1
10 = fix state 2
11 = fix state 3
0 = adaptive
1 = fixed
00 = lock after 512 samples
01 = lock after 2048 samples
10 = lock after 4096 samples
11 = lock after 16348 samples
1
2
S-bus
VALUE
Preliminary specification
s
= 44.1 kHz. When
UDA1325
select 0
select 00
select 1
select 00
COMMENT

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