pca9952 NXP Semiconductors, pca9952 Datasheet - Page 17

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pca9952

Manufacturer Part Number
pca9952
Description
16-channel Fm+ I 2c-bus 57 Ma Constant Current Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA9952_PCA9955
Product data sheet
7.3.9 LED bit Sub Call I
The order in which the LEDn outputs are enabled will always be the same (channel 0 will
enable first and channel 15 will enable last).
OFFSET control register bits [3:0] determine the delay used between the turn-on times as
follows:
Example: If the value in the OFFSET register is 1000 the corresponding delay =
8  125 ns = 1 s delay between successive outputs.
Table 14.
Legend: * default value.
Address
3Bh
3Ch
3Dh
0000 = no delay between outputs (all on, all off at the same time)
0001 = delay of 1 clock cycle (125 ns) between successive outputs
0010 = delay of 2 clock cycles (250 ns) between successive outputs
0011 = delay of 3 clock cycles (375 ns) between successive outputs
:
1111 = delay of 15 clock cycles (1.875 s) between successive outputs
channel 0 turns on at time 0 s
channel 1 turns on at time 1 s
channel 2 turns on at time 2 s
channel 3 turns on at time 3 s
channel 4 turns on at time 4 s
channel 5 turns on at time 5 s
channel 6 turns on at time 6 s
channel 7 turns on at time 7 s
channel 8 turns on at time 8 s
channel 9 turns on at time 9 s
channel 10 turns on at time 10 s
channel 11 turns on at time 11 s
channel 12 turns on at time 12 s
channel 13 turns on at time 13 s
channel 14 turns on at time 14 s
channel 15 turns on at time 15 s
Register
SUBADR1
SUBADR2
SUBADR3
SUBADR1 to SUBADR3 - I
3Dh) bit description
All information provided in this document is subject to legal disclaimers.
2
C-bus addresses for PCA9952/55
Rev. 1 — 2 December 2011
Bit
7:1
0
7:1
0
7:1
0
16-channel Fm+ I
Symbol
A1[7:1]
A1[0]
A2[7:1]
A2[0]
A3[7:1]
A3[0]
2
C-bus subaddress registers 1 to 3 (address 3Bh to
Access Value
R/W
R only
R/W
R only
R/W
R only
2
C-bus 57 mA constant current LED driver
PCA9952; PCA9955
1110 110*
0*
1110 110*
0*
1110 110*
0*
I
I
Description
I
reserved
reserved
reserved
2
2
2
C-bus subaddress 1
C-bus subaddress 2
C-bus subaddress 3
© NXP B.V. 2011. All rights reserved.
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