pca9952 NXP Semiconductors, pca9952 Datasheet - Page 23

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pca9952

Manufacturer Part Number
pca9952
Description
16-channel Fm+ I 2c-bus 57 Ma Constant Current Led Driver
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
PCA9952_PCA9955
Product data sheet
7.5 Power-on reset
7.6 Hardware reset recovery
7.7 Software reset
When power is applied to V
reset condition until V
and the PCA9952/55 registers and I
states (all zeroes) causing all the channels to be deselected. Thereafter, V
pulled lower than 1 V and stay LOW for longer than 20 s. The device will reset itself, and
allow 2 ms for the device to fully wake up.
When a reset of PCA9952/55 is activated using an active LOW input on the RESET pin, a
reset pulse width of 2.5 s minimum is required. The maximum wait time after RESET pin
is released is 1.5 ms (typical).
The Software Reset Call (SWRST Call) allows all the devices in the I
the power-up state value through a specific formatted I
correctly, it implies that the I
bus.
The maximum wait time after software reset is 1 ms (typical).
The SWRST Call function is defined as the following:
5. Once the correct byte (SWRST data byte 1) has been sent and correctly
1. A START command is sent by the I
2. The reserved General Call address ‘0000 000’ with the R/W bit set to ‘0’ (write) is sent
3. The PCA9952/55 device(s) acknowledge(s) after seeing the General Call address
4. Once the General Call address has been sent and acknowledged, the master sends
by the I
‘0000 0000’ (00h) only. If the R/W bit is set to ‘1’ (read), no acknowledge is returned to
the I
1 byte with 1 specific value (SWRST data byte 1):
a. Byte 1 = 06h: the PCA9952/55 acknowledges this value only. If byte 1 is not equal
If more than 1 byte of data is sent, the PCA9952/55 does not acknowledge any more.
acknowledged, the master sends a STOP command to end the SWRST function: the
PCA9952/55 then resets to the default value (power-up value) and is ready to be
addressed again within the specified bus free time (t
to 06h, the PCA9952/55 does not acknowledge it.
2
C-bus master.
2
C-bus master.
All information provided in this document is subject to legal disclaimers.
DD
Rev. 1 — 2 December 2011
has reached V
16-channel Fm+ I
DD
2
C-bus is functional and that there is no device hanging the
, an internal power-on reset holds the PCA9952/55 in a
2
C-bus state machine are initialized to their default
2
POR
C-bus master.
. At this point, the reset condition is released
2
C-bus 57 mA constant current LED driver
PCA9952; PCA9955
2
C-bus command. To be performed
BUF
).
2
C-bus to be reset to
© NXP B.V. 2011. All rights reserved.
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must be
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