adsp-21371 Analog Devices, Inc., adsp-21371 Datasheet - Page 33

• Manufacturer Part Number: adsp-21371
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

Input Data Port (IDP)
The timing requirements for the IDP are given in
signals (SCLK, FS, and SDATA) are routed to the DAI_P20–1
pins using the SRU. Therefore, the timing specifications pro-
vided below are valid at the DAI_P20–1 pins.
Table 31. Input Data Port (IDP)
1
Parameter
Timing Requirements
t
t
t
t
t
t
DATA, SCLK, FS can come from any of the DAI pins. SCLK and FS can also come via PCG or SPORTs. PCG's input can be either CLKIN or any of the DAI pins.
SISFS
SIHFS
SISD
SIHD
IDPCLKW
IDPCLK
1
1
1
1
FS Setup Before SCLK Rising Edge
FS Hold After SCLK Rising Edge
SData Setup Before SCLK Rising Edge
SData Hold After SCLK Rising Edge
Clock Width
Clock Period
DAI_P20
DAI_P20
DAI_P20
(SDATA)
(SCLK)
(FS)
-
-
-
1
1
1
Table
Rev. 0 | Page 33 of 48 | June 2007
Figure 21. IDP Master Timing
31. IDP
t
IPDCLKW
t
SISFS
t
SISD
SAMPLE EDGE
t
IPDCLK
t
SIHFS
t
SIHD
Min
3.8
2.5
2.5
2.5
9
24
Max
ADSP-21371
Unit
ns
ns
ns
ns
ns
ns