adsp-21371 Analog Devices, Inc., adsp-21371 Datasheet - Page 39

• Manufacturer Part Number: adsp-21371
• Description: Sharc Processor
• Manufacturer: Analog Devices, Inc.

SPI Interface—Master
The ADSP-21371 contains two SPI ports. Both primary and sec-
ondary are available through DPI only. The timing provided in
Table 37
Table 37. SPI Interface Protocol
Parameter
Timing Requirements
t
t
Switching Characteristics
t
t
t
t
t
t
t
t
SSPIDM
HSPIDM
SPICLKM
SPICHM
SPICLM
DDSPIDM
HDSPIDM
SDSCIM
HDSM
SPITDM
CPHASE = 1
CPHASE = 0
and
Table 38
FLAG3
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(OUTPUT)
SPICLK
(CP = 0)
SPICLK
(CP = 1)
MOSI
(INPUT)
MOSI
(INPUT)
MISO
MISO
-
0
applies to both.
Data Input Valid To SPICLK Edge (Data Input Setup Time)
SPICLK Last Sampling Edge To Data Input Not Valid
Serial Clock Cycle
Serial Clock High Period
Serial Clock Low Period
SPICLK Edge to Data Out Valid (Data Out Delay Time)
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
FLAG3–0IN (SPI device select) Low to First SPICLK Edge
Last SPICLK Edge to FLAG3–0IN High
Sequential Transfer Delay
t
SSPIDM
t
SDSCIM
—
VALID
MSB
Master Switching and Timing Specifications
t
t
MSB
SPICHM
SPICL M
VALID
MSB
t
HSPIDM
t
t
D DSPIDM
t
SSPIDM
t
MSB
SPICLM
SPICHM
Rev. 0 | Page 39 of 48 | June 2007
Figure 29. SPI Master Timing
t
DDS PIDM
t
HSPIDM
t
HDSPIDM
t
t
SSPIDM
HDSPIDM
t
VALID
SPI CLKM
LSB
LSB
Min
2
8 × t
4 × t
4 × t
2
4 × t
4 × t
8.2
4 × t
VALID
LSB
PCLK
PCLK
PCLK
PCLK
PCLK
PCLK
t
HDSM
– 2
– 2
– 2
– 2
– 2
– 1
LSB
t
HS PIDM
t
SPIT DM
Max
2.5
ADSP-21371
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns