dsp56002fc80 Freescale Semiconductor, Inc, dsp56002fc80 Datasheet - Page 103

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dsp56002fc80

Manufacturer Part Number
dsp56002fc80
Description
24-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
ELECTRICAL DESIGN CONSIDERATIONS
MOTOROLA
Use the following list of recommendations to assure correct DSP operation:
Provide a low-impedance path from the board power supply to each V
on the DSP, and from the board ground to each GND pin.
Use at least four 0.1 F bypass capacitors positioned as close as possible to the
four sides of the package to connect the V
Ensure that capacitor leads and associated printed circuit traces that connect
to the chip V
Use at least a four-layer Printed Circuit Board (PCB) with two inner layers for
V
Because the DSP output signals have fast rise and fall times, PCB trace lengths
should be minimal. This recommendation particularly applies to the address
and data buses as well as the RD, WR, IRQA, IRQB, NMI, HEN, and HACK
pins.
Consider all device loads as well as parasitic capacitance due to PCB traces
when calculating capacitance. This is especially critical in systems with higher
capacitive loads that could create higher transient currents in the V
GND circuits.
All inputs must be terminated (i.e., not allowed to float) using CMOS levels.
Take special care to minimize noise levels on the PLL supply pins (both V
and GND).
CC
and GND.
This device contains protective circuitry to
guard against damage due to high static
voltage or electrical fields. However, normal
precautions are advised to avoid application
of any voltages higher than maximum rated
voltages to this high-impedance circuit.
Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage
level (e.g., either GND or V
CC
and GND pins are less than 0.5 inch per capacitor lead.
DSP56002/D, Rev. 3
CAUTION
CC
).
CC
power source to GND.
Electrical Design Considerations
Design Considerations
CC
and
CC
CC
pin
4-3

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