dsp56002fc80 Freescale Semiconductor, Inc, dsp56002fc80 Datasheet - Page 45

• Manufacturer Part Number: dsp56002fc80
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

SYNCHRONOUS SERIAL INTERFACE (SSI) TIMING
C
t
TXC (SCK Pin) = Transmit Clock
RXC (SC0 or SCK Pin) = Receive Clock
FST (SC2 Pin) = Transmit Frame Sync
FSR (SC1 or SC2 Pin) = Receive Frame Sync
i ck = Internal Clock
x ck = External Clock
g ck = Gated Clock
i ck a = Internal Clock, Asynchronous Mode (Asynchronous implies that
i ck s = Internal Clock, Synchronous Mode (Synchronous implies that
bl = bit length
wl = word length
MOTOROLA
SSICC
Num
L
80
81
82
84
85
86
87
88
= 50 pF + 2 TTL loads
= SSI clock cycle time
STD and SRD are two different clocks)
STD and SRD are the same clock)
Clock Cycle–t
Clock High Period
Clock Low Period
RXC Rising Edge to
FSR Out (bl) High
RXC Rising Edge to
FSR Out (bl) Low
RXC Rising Edge to
FSR Out (wl) High
RXC Rising Edge to
FSR Out (wl) Low
Data In Setup Time
Before RXC (SCK in
Synchronous Mode)
Falling Edge
Characteristics
SSICC
1
t
t
SSICC
SSICC
40 MHZ or 66 MHz
T
T
C
C
Min
15.8
4T
3T
/2 – 10.8
/2 – 10.8
3.3
—
—
—
—
—
—
—
—
13
+ T
+ T
Table 2-11 SSI Timing
DSP56002/D, Rev. 3
C
C
L
L
Max
40.8
25.8
35.8
25.8
35.8
20.8
35.8
20.8
—
—
—
—
—
—
—
—
—
Synchronous Serial Interface (SSI) Timing
T
T
T
T
Min
15.8
4T
3T
C
C
C
C
3.3
—
—
—
—
—
—
—
—
13
+ 5
+ 5
+ 5
+ 5
C
C
80 MHz
Max
25.8
25.8
20.8
20.8
—
—
—
—
—
—
30
30
30
30
—
—
—
Specifications
i ck a
i ck a
i ck a
i ck a
i ck a
Case
i ck s
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
Unit
2-19
ns
ns
ns
ns
ns
ns
ns
ns