dsp56002fc80 Freescale Semiconductor, Inc, dsp56002fc80 Datasheet - Page 19

• Manufacturer Part Number: dsp56002fc80
• Description: 24-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
HEN
PB12
HREQ
PB13
HACK
PB14
Signal
Name
Output
Output
Output
Output
Signal
Input
Input
Open
Input
Input
Input
Type
drain
or
or
or
Tri-stated Host Enable—This input enables a data transfer on the host data
Tri-stated Host Request—This signal is used by the Host Interface to
Tri-stated Host Acknowledge—This input has two functions. It provides a
during
Reset
State
Table 1-9 HI Signals (Continued)
bus. When HEN is asserted and HR/W is high, H0–H7 become
outputs and the host processor may read DSP56002/L002 data.
When HEN is asserted and HR/W is low, H0–H7 become
inputs. Host data is latched inside the DSP on the rising edge of
HEN. Normally, a chip select signal derived from host address
decoding and an enable strobe are used to generate HEN.
Port B GPIO 12 (PB12)—This signal is a General Purpose I/O
signal called PB12 when the Host Interface is not being used.
After reset, the default state for this signal is GPIO input.
request service from the host processor, DMA controller, or a
simple external controller.
Note:
Port B GPIO 13 (PB13)—This signal is a General Purpose (not
open-drain) I/O signal (PB13) when the Host Interface is not
selected.
After reset, the default state for this signal is GPIO input.
host acknowledge handshake signal for DMA transfers and it
receives a host interrupt acknowledge compatible with MC68000
family processors.
Note:
Port B GPIO 14 (PB14)—This signal is a General Purpose I/O
signal (PB14) when the Host Interface is not selected.
After reset, the default state for this signal is GPIO input.
DSP56002/D, Rev. 3
HREQ should always be pulled high when it is not in
use.
HACK should always be pulled high when it is not in
use.
Signal Description
Signal/Pin Descriptions
Host Interface (HI) Port
1-13