dsp56002fc80 Freescale Semiconductor, Inc, dsp56002fc80 Datasheet - Page 35

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dsp56002fc80

Manufacturer Part Number
dsp56002fc80
Description
24-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
Num
16a Minimum Edge-Triggered Interrupt Request Deassertion
17 Delay from IRQA, IRQB, NMI Assertion to External Memory
18 Delay from IRQA, IRQB, NMI Assertion to General Purpose
19 Delay from Address Output Valid caused by First Interrupt
20 Delay from RD Assertion to Interrupt Request
21 Delay from WR Assertion to Interrupt Request Deassertion
22 Delay from General-Purpose Output Valid to Interrupt
23 Synchronous Interrupt Setup Time from IRQA, IRQB, NMI
24 Synchronous Interrupt Delay Time from the second CKOUT
25 Duration for IRQA Assertion to Recover from Stop State
26 Delay from IRQA Assertion to Fetch of First Interrupt
27 Duration of Level Sensitive IRQA Assertion to ensure
Table 2-7 Reset, Stop, Mode Select, and Interrupt Timing (All Frequencies) (Continued)
Width
Access Address Out Valid
Transfer Output Valid caused by First Interrupt Instruction
Execution
Instruction Execute to Interrupt Request
Deassertion for Level Sensitive Fast Interrupts
Deassertion for Level Sensitive Fast Interrupts
for Level Sensitive Fast Interrupts
Request Deassertion for Level Sensitive Fast Interrupts
—If Second Interrupt Instruction is:
Assertion to the second CKOUT transition
transition to the First External Address Output Valid caused
by the First Instruction Fetch after coming out of Wait State
Instruction (when exiting ‘Stop’)
interrupt service (when exiting ‘Stop’)
Caused by First Interrupt Instruction Fetch
Caused by First Interrupt Instruction Execution
WS = 0
WS > 0
Single Cycle
Two Cycles
Internal Crystal Oscillator Clock, OMR bit 6 = 0
Stable External Clock, OMR Bit 6 = 1
Stable External Clock, PCTL Bit 17 = 1
Internal Crystal Oscillator Clock, OMR bit 6 = 0
Stable External Clock, OMR Bit 6 = 1
Stable External Clock, PCTL Bit 17 = 1
Characteristics
1
DSP56002/D, Rev. 3
3
1
3
3
RESET, Stop, Mode Select, and Interrupt Timing
3
65534T
11T
13T
5T
9T
6T
65548T
20T
13T
Min
C
C
C
C
C
13
10
12
12
+ T
+ T
+ T
+ T
+ T
C
C
C
+ T
C
H
H
L
H
H
L
(T
(T
(T
13T
2T
2 T
C
C
C
T
2T
C
C
T
C
2T
C
Max
+ T
L –
WS) – 23
C
+ T
WS) – 21
WS) – 21
+ T
T
Specifications
+ T
C
– 21
C
31
L
+
L
H
L
– 31
+
+ 6
+
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-9

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