saa7142hl NXP Semiconductors, saa7142hl Datasheet - Page 12

• Manufacturer Part Number: saa7142hl
• Description: Saa7142hl Dual Video Input Processor
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 15208
Product data sheet
8.3 Chrominance processing
The 9-bit chrominance signal is fed to the multiplication inputs of a quadrature
demodulator, where two subcarrier signals from the local Digitally Tuned Oscillator (DTO)
are applied (0 and 90 phase relationship to the demodulator axis). The frequency is
dependent on the present color standard.
The output signals of the multipliers are low-pass filtered (four programmable
characteristics) to achieve the desired bandwidth for the color difference signals (PAL,
NTSC) or the 0 and 90 FM signals (SECAM).
The color difference signals are fed to the Brightness Contrast Saturation (BCS) block,
which contains the following five functions:
Fig 8. Clamp and gain flow.
•
•
•
•
•
AGC (automatic gain control for chrominance PAL and NTSC)
Chrominance amplitude matching (different gain factors for (R
achieve ITU-R BT 601 levels C
Chrominance saturation control
Luminance contrast and brightness
Limiting Y-C
requirements.
NO BLANKING ACTIVE
CLAMP
WIPE = white peak level (254).
SBOT = sync bottom level (1).
CLL = clamp level [60 Y (128 C)].
HSY = horizontal sync pulse.
HCL = horizontal clamp pulse.
1
CLL
B
-C
R
CLAMP
to the values 1 (minimum) and 254 (maximum) to fulfil ITU-R BT 601
0
Rev. 01 — 16 January 2006
1
HCL
<- CLAMP
NO CLAMP
ANALOG INPUT
1
0
VBLK
ADC
R
and C
0
B
GAIN
for all standards)
0
SBOT
GAIN ->
1
1
GAIN
HSY
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Dual video input processor
fast
0
SAA7142HL
GAIN
1
Y) and (B
WIPE
slow
0
mgc647
GAIN
Y) to
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