admc201 Analog Devices, Inc., admc201 Datasheet - Page 14

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admc201

Manufacturer Part Number
admc201
Description
Motion Coprocessor
Manufacturer
Analog Devices, Inc.
Datasheet

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ADMC201
Bit
0
1
2
4
11
NOTES
1
2
Bit 0
Bit 1
Bit 4
Bit 11 If any interrupt source on the ADMC201 occurs, then
Reading this register clears the interrupt status flags Bits 0, 1, 2 and 11.
Undefined until the first Vector Transformation has started
Table VIII. System Status Register (SYSSTAT)
A/D Conversion Completion Interrupt. This register
is set to 1 when the A/D conversion process has com-
pleted and ADC interrupts have been enabled in the
SYSCTRL register.
Interrupt Status. This register is set to 1 when the
Vector Transformation is completed and the Vector
Transformation completion interrupts have been
enabled.
This bit is set to 1 when the rotation results are valid
reading this.
this bit is set to 1.
Function
A/D Conversion
Completion Interrupt
(1 = True)
Vector Transformation
Completion Interrupt
(1 = True)
Digital I/O Change of State
Interrupt (1 = True)
Rotation Results are Valid
(1 = Valid)
IRQ Generated from This
Device (1 = True)
RESET
Default
0
0
0
X
0
2
1
–14–
Bits 0–5 Sets corresponding Digital I/O bits as either input
Bits 6–11 Configures Digital I/O Bits 0–5 as interrupt on
Bit
Table IX. Programmable Digital I/O Control Register
(PIOCTRL)
0
1
2
3
4
5
6
7
8
9
10
11
Function
Programmable Digital I/O Direction
Bit 0 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 1 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 2 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 3 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 4 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 5 (0 = Input, 1 = Output)
Programmable Digital I/O Bit 0 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 1 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 2 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 3 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 4 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 5 Interrupt
(0 = Disable, 1 = Enable)
or output.
change of state sources. Enabling interrupts for bits
configured as output has no effect.
RESET
Default
REV. B
0
0
0
0
0
0
0
0
0
0
0
0

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