at40kal ATMEL Corporation, at40kal Datasheet - Page 2

• Manufacturer Part Number: at40kal
• Description: At40kal Military Reprogrammable Fpgas With Freeram
• Manufacturer: ATMEL Corporation

Description
Fast, Flexible and
Efficient SRAM
Fast, Efficient Array and
Vector Multipliers
Cache Logic Design
Automatic Component
Generators
2
AT40KAL
***
Table 1. AT40KAL
Note:
The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed
14 ns programmable synchronous/asynchronous, dual port/single port SRAM, 8 global
clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), auto-
matic component generators, and 50,000 usable gates. I/O counts range from 128 to
384 in Aerospace standard packages and support 3.3V.
The AT40KAL is designed to quickly implement high performance, large gate count
designs through the use of synthesis and schematic-based tools used on a PC and
Sun
tools such as Synplicity, Modelsim, Exemplar and Viewlogic. See the IDS datasheet for
other supported tools.
The AT40KAL can be used as a co-processor for high-speed (DSP/processor-based)
designs by implementing a variety of compute-intensive, arithmetic functions. These
include adaptive finite impulse response (FIR) filters, Fast Fourier Transforms (FFT),
convolvers, interpolators and discrete-cosine transforms (DCT) that are required for
video compression and decompression, encryption, convolution and other multimedia
applications.
The AT40KAL FPGA offers a patented distributed 11 - 13 ns SRAM capability where the
RAM can be used without losing logic resources. Multiple independent, synchronous or
asynchronous, dual port or single port RAM functions (FIFO, scratch pad, etc.) can be
created using Atmel’s macro generator tool.
The AT40KAL’s patented 8-sided core cell with direct horizontal, vertical and diagonal
cell-to-cell connections implements ultra fast array multipliers without using any busing
resources. The AT40KAL’s Cache Logic capability enables a large number of design
coefficients and variables to be implemented in a very small amount of silicon, enabling
vast improvement in system speed at much lower cost than conventional FPGAs.
The AT40KAL is capable of implementing Cache Logic (Dynamic full/partial logic recon-
figuration, without loss of data, on-the-fly) for building adaptive logic and systems. As
new logic functions are required, they can be loaded into the logic cache without losing
the data already there or disrupting the operation of the rest of the chip; replacing or
complementing the active logic. The AT40KAL can act as a reconfigurable co-proces-
sor.
The AT40KAL FPGA family is capable of implementing user-defined, automatically gen-
erated, macros in multiple designs; speed and functionality are unaffected by the macro
orientation or density of the target device. This enables the fastest, most predictable and
efficient FPGA design approach and minimizes design risk by reusing already proven
functions. The Automatic Component Generators work seamlessly with industry-stan-
Device
Usable Gates
Rows x Columns
Cells
Registers
RAM Bits
I/O (max)
™
platform. Atmel’s design tools provide seamless integration with industry standard
1. Packages with FCK will have 8 less clocks.
AT40KAL040
40K - 50K
48 x 48
3,048
18,432
2,304
384
(1)
4263B–AERO–06/03