at40kal ATMEL Corporation, at40kal Datasheet - Page 9

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at40kal

Manufacturer Part Number
at40kal
Description
At40kal Military Reprogrammable Fpgas With Freeram
Manufacturer
ATMEL Corporation
Datasheet
The Cell
Figure 5. The Cell
4263B–AERO–06/03
"1" NW NE SE SW
X
NW NE SE SW
8X1 LUT
OUT
X
"0"
"1"
Z
1 0
"1"
W
D
Q
CLOCK
RESET/SET
N
"1"
E
8X1 LUT
N
OUT
Y
S
Figure 5 depicts the AT40KAL cell. Configuration bits for separate muxes and pass
gates are independent. All permutations of programmable muxes and pass gates are
legal. V
nected to the horizontal local bus in plane n. A local/local turn in plane n is achieved by
turning on the two pass gates connected to V
nals into the cell from a local bus or to drive a signal out onto a local bus. Signals coming
into the logic cell on one local bus plane can be switched onto another plane by opening
two of the pass gates. This allows bus signals to switch planes to achieve greater
routability. Up to five simultaneous local/local turns are possible.
The AT40KAL FPGA core cell is a highly configurable logic block based around two 3-
input LUTs (8 x 1 ROM), which can be combined to produce one 4-input LUT. This
means that any core cell can implement two functions of 3 inputs or one function of 4
inputs. There is a Set/Reset D flip-flop in every cell, the output of which may be tri-stated
and fed back internally within the core cell. There is also a 2-to-1 multiplexer in every
cell, and an upstream AND gate in the “front end” of the cell. This AND gate is an impor-
tant feature in the implementation of efficient array multipliers.
With this functionality in each core cell, the core cell can be configured in several
“modes”. The core cell flexibility makes the AT40KAL architecture well suited to most
digital design application areas (see Figure 6).
E
W
Y
S
W
n
(V
"1"
1
FB
- V
5
) is connected to the vertical local bus in plane n. H
V1
H1
Z
V2
H2
"1" OE
H
OE
n
X = Diagonal Direct connect or Bus
Y = Orthogonal Direct Connector Bus
W = Bus Connection
Z = Bus Connection
FB = Internal Feed back
and H
V
X
V3
H3
n
. Pass gates are opened to let sig-
L
W
V4
H4
Pass gates
AT40KAL
n
(H
1
- H
V5
H5
Y
5
) is con-
9

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