ep1agx50d Altera Corporation, ep1agx50d Datasheet - Page 146
ep1agx50d
Manufacturer Part Number
ep1agx50d
Description
Arria Gx Device Data Sheet
Manufacturer
Altera Corporation
Datasheet
1.EP1AGX50D.pdf
(296 pages)
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Configuration and Testing
3–6
Arria GX Device Handbook, Volume 1
f
input buffer. The V
3.3-V/2.5-V input buffer is powered by V
input buffer is powered by V
V
change on-the-fly or during a reconfiguration. The V
powered by V
high V
low selects the 3.3-V/2.5-V input buffer. V
with the logic levels driven out of the configuration device or MAX II
microprocessor.
If the design must support configuration input voltages of 3.3 V/2.5 V, set
V
contains the configuration inputs to any supported voltage. If the design
must support configuration input voltages of 1.8 V/1.5 V, set V
logic high and the V
inputs to 1.8 V/1.5 V.
For more information about multi-volt support, including information
about using TDO and nCEO in multi-volt systems, refer to the
Architecture
Configuration Schemes
You can load the configuration data for an Arria GX device with one of
five configuration schemes (refer to
target application. You can use a configuration device, intelligent
controller, or the JTAG port to configure an Arria GX device. A
configuration device can automatically configure an Arria GX device at
system power up.
You can configure multiple Arria GX devices in any of the five
configuration schemes by connecting the configuration enable (nCE) and
configuration enable output (nCEO) pins on each device. Arria GX FPGAs
offer the following:
■
■
CCSEL
CCSEL
Configuration data decompression to reduce configuration file
storage
Remote system upgrades for remotely updating Arria GX designs
CCSEL
is sampled during power up. Therefore, the V
to a logic low. You can set the V
chapter in volume 1 of the Arria GX Device Handbook.
connection selects the 1.8-V/1.5-V input buffer, and a logic
CCINT
CCSEL
and must be hard-wired to V
CCIO
input pin selects which input buffer is used. The
of the bank that contains the configuration
CCIO
.
Table
CCIO
CCPD
3–4), chosen on the basis of the
CCSEL
voltage of the I/O bank that
, while the 1.8-V/1.5-V
should be set to comply
CCPD
CCSEL
CCSEL
or ground. A logic
Altera Corporation
input buffer is
setting cannot
Arria GX
CCSEL
May 2008
to a
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