cy8c5588pvi-115es0 Cypress Semiconductor Corporation., cy8c5588pvi-115es0 Datasheet - Page 82
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cy8c5588pvi-115es0
Manufacturer Part Number
cy8c5588pvi-115es0
Description
Cy8c55 Family Data Sheet Programmable System-on-chip Psoc?
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
1.CY8C5588PVI-115ES0.pdf
(102 pages)
- Current page: 82 of 102
- Download datasheet (3Mb)
Table 11-6. NVL AC Specifications
11.1.4 SRAM
Table 11-7. SRAM DC Specifications
Table 11-8. SRAM AC Specifications
11.1.5 External Memory Interface
Table 11-1. Asynchronous Read Cycle Specifications
Document Number: 001-44094 Rev. *J
V
F
T
Tcel
Taddrv
Taddrh
Toev
Parameter
Parameter
Parameter
Parameter
SRAM
SRAM
NVL endurance
NVL data retention time
SRAM retention voltage
SRAM operating frequency
EMIF clock period
EM_CEn low time
EM_CEn low to EM_Addr valid
Address hold time after EM_OEn high
EM_CEn low to EM_OEn low
EM_Addr
EM_WEn
EM_Data
EM_OEn
EM_CEn
Description
Description
Description
Description
Toev
Taddrv
Figure 11-1. Asynchronous Read Cycle Timing
PRELIMINARY
Programmed at 25 °C
Programmed at 0 °C to 70 °C
Programmed at 25 °C
Programmed at 0 °C to 70 °C
Tcel
Toel
Address
Tdoesu
Tdcesu
Conditions
Conditions
Conditions
Conditions
PSoC
Data
®
5: CY8C55 Family Datasheet
2 × T – 1
30.3
Min
100
Min
Min
Min
1.2
DC
1K
20
20
–5
–
2
Toeh
Tdoeh
Tdceh
Taddrh
Typ
Typ
Typ
Typ
–
–
–
–
–
–
–
–
–
–
–
2 × T + 2
Max
Max
Max
Max
80
–
–
–
–
–
–
5
–
5
Page 82 of 102
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