z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 152
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80189.pdf
(326 pages)
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ASCI0 Time Constant Low Register (I/O Address: 1AH) (Z8S180/L180-Class Processors
Only)
ASCI0 Time Constant High Register (I/O Address: 1BH) (Z8S180/L180-Class Processors
Only)
Bit
Position Bit/Field
2
1
0
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Break
Feature
Enable
Break
Detect
(RO)
Send
Break
R/W
R/W
7
0
7
0
Each ASCI channel control register B configures multiprocessor mode,
parity and baud rate selection.
R/W
R/W
R/W
R/W
R/W
R/W
6
6
0
0
Value Description
0
1
0
1
0
1
R/W
R/W
5
0
5
0
Break Feature Enable On
Break Feature Enable Off
Break Detect On
Break Detect Off
Normal Xmit
Drive TXA Low
R/W
R/W
4
4
0
0
R/W
R/W
3
0
3
0
Family MPU User Manual
R/W
R/W
2
2
0
0
UM005003-0703
R/W
R/W
1
0
1
0
Z8018x
R/W
R/W
0
0
0
0
137
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