z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 216
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80189.pdf
(326 pages)
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200
UM005003-0703
DREQ1
(level sense)
DREQ1
PHI
(edge sense)
TENDi
ST
Notes:
Z8018x
Family MPU User Manual
**T
*T
DRQS
DRQS
and T
DMA Cycle
Starts
and T
DRQH
Figure 84.
DRQH
are specified for the rising edge of the clock followed by T
are specified for the rising edge of the clock.
17
T
1
CPU or DMA Read/Write Cycle (Only DMA Write Cycle for TENDi)
DMA Control Signals
45 46
47
T
**
2
45
T
W
46
*
T
3
3
.
48
Starts
CPU Cycle
18
T
1
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