mc68hc908ld60 Freescale Semiconductor, Inc, mc68hc908ld60 Datasheet - Page 144

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mc68hc908ld60

Manufacturer Part Number
mc68hc908ld60
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface Module (TIM)
11.2 Introduction
11.3 Features
11.4 Pin Name Conventions
Technical Data
144
NOTE:
This section describes the timer interface module (TIM2, Version B). The
TIM is a two-channel timer that provides a timing reference with input
capture, output compare, and pulse-width-modulation functions.
Figure 11-1
Features of the TIM include the following:
TCH1 (timer channel 1) is not bonded to an external pin on this MCU.
Therefore, any references to the timer TCH1 pin in the following text
should be interpreted as not available — but the internal status and
control registers are still available.
The TIM shares the TCH0 pin with the sync processor CLAMP output.
Two input capture/output compare channels
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
Buffered and unbuffered pulse width modulation (PWM) signal
generation
Programmable TIM clock input
– Seven-frequency internal bus clock prescaler selection
Free-running or modulo up-count operation
Toggle any channel pin on overflow
TIM counter stop and reset bits
Modular architecture expandable to eight channels
Timer Interface Module (TIM)
is a block diagram of the TIM.
Pin Selected for TCH0 By:
TIM Generic Pin Name:
Full TIM Pin Name:
Table 11-1. Pin Name Conventions
ELS0B:ELS0A
CLAMP/TCH0
MC68HC908LD60
TCH0
Freescale Semiconductor
Rev. 1.1

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