mc68hc908ld60 Freescale Semiconductor, Inc, mc68hc908ld60 Datasheet - Page 198

• Manufacturer Part Number: mc68hc908ld60
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

DDC12AB Interface
15.5 DDC Protocols
15.6 DDC Registers
15.6.1 DDC Address Register (DADR)
Technical Data
198
Address:
In DDC1 protocol communication, the module is in transmit mode. The
data written to the transmit register is continuously clocked out to the
SDA line by the rising edge of the Vsync input signal. During DDC1
communication, a falling transition on the SCL line can be detected to
generate an interrupt to the CPU for mode switching.
In DDC2AB protocol communication, the module can be either in
transmit mode or in receive mode, controlled by the calling master.
In DDC2 protocol communication, the module will act as a standard IIC
module, able to act as a master or a slave device.
Seven registers are associated with the DDC module, they outlined in
the following sections.
DAD[7:1] — DDC Address
Reset:
Read:
Write:
These seven bits can be the DDC2 interface’s own specific slave
address in slave mode or the calling address when in master mode.
Software must update it as the calling address while entering the
master mode and restore its own slave address after the master mode
is relinquished. Reset sets a default value of $A0.
$0017
DAD7
Bit 7
1
Figure 15-2. DDC Address Register (DADR)
DDC12AB Interface
DAD6
6
0
DAD5
5
1
DAD4
4
0
DAD3
3
0
MC68HC908LD60
DAD2
Freescale Semiconductor
2
0
DAD1
1
0
—
Rev. 1.1
EXTAD
Bit 0
0