mc68hc908ld60 Freescale Semiconductor, Inc, mc68hc908ld60 Datasheet - Page 225

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mc68hc908ld60

Manufacturer Part Number
mc68hc908ld60
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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16.6.4 Hsync Frequency Registers (HFRs)
MC68HC908LD60
Freescale Semiconductor
Rev. 1.1
Address:
Address:
CPW[1:0] — Clamp Pulse Width
This register pair contains the 13-bit Hsync frequency count value and
an overflow bit.
Reset:
Reset:
Read:
Read: HOVER
Write:
Write:
The CPW1 and CPW0 bits are used to select the output clamp pulse
width. Reset clears these bits, selecting a default clamp pulse width
between 0.33µs and 0.375µs. These bits always read as Zeros.
$0043
$0044
HFH7
Bit 7
Bit 7
0
0
Figure 16-8. Hsync Frequency High Register
Figure 16-9. Hsync Frequency Low Register
CPW1
0
0
1
1
= Unimplemented
HFH6
Sync Processor
6
0
6
0
0
Table 16-6. Clamp Pulse Width
HFH5
5
0
5
0
0
HFH4
HFL4
CPW0
4
0
4
0
0
1
0
1
HFH3
HFL3
3
0
3
0
Sync Processor I/O Registers
Clamp Pulse Width
0.33µs to 0.375µs
0.75µs to 0.792µs
0.5µs to 0.542µs
HFH2
HFL2
2µs to 2.042µs
2
0
2
0
HFH1
HFL1
Sync Processor
1
0
1
0
Technical Data
HFH0
HFL0
Bit 0
Bit 0
0
0
225

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