mc68hc908mr24 Freescale Semiconductor, Inc, mc68hc908mr24 Datasheet - Page 263

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mc68hc908mr24

Manufacturer Part Number
mc68hc908mr24
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MC68HC908MR24 — Rev. 4.1
Freescale Semiconductor
is the slave select input to the slave. The slave SPI drives its MISO
output only when its slave select input (SS) is at logic 0, so that only the
selected slave drives to the master. The SS pin of the master is not
shown but is assumed to be inactive. The SS pin of the master must be
high or must be reconfigured as general-purpose I/O not affecting the
SPI. (See
edge is the MSB capture strobe. Therefore, the slave must begin driving
its data before the first SPSCK edge, and a falling edge on the SS pin is
used to start the slave data transmission. The slave’s SS pin must be
toggled back to high and then low again between each byte transmitted
as shown in
CAPTURE STROBE
MASTER SS
FOR REFERENCE
MISO/MOSI
SPSCK, CPOL = 0
SPSCK, CPOL = 1
SLAVE SS
SLAVE SS
SPSCK CYCLE #
CPHA = 0
CPHA = 1
FROM MASTER
SS, TO SLAVE
FROM SLAVE
Serial Peripheral Interface Module (SPI)
MOSI
MISO
13.7.2 Mode Fault
Figure 13-4. Transmission Format (CPHA = 0)
Figure
MSB
MSB
BYTE 1
Figure 13-5. CPHA/SS Timing
13-5.
1
BIT 6
BIT 6
2
Error.) When CPHA = 0, the first SPSCK
BIT 5
BIT 5
3
BIT 4
BIT 4
BYTE 2
Serial Peripheral Interface Module (SPI)
4
BIT 3
BIT 3
5
BIT 2
BIT 2
6
Advance Information
BYTE 3
BIT 1
BIT 1
7
LSB
LSB
8
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